PDM41256SA12DB datasheet, PDF - EEWORLD Datasheet

PDM41256SA12DB: DescriptionStandard SRAM, 32KX8, 12ns, CMOS, CDIP28; Categorystorage storage; File Size359KB，8 Pages; ManufacturerParadigm Technology Inc

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PDM41256SA12DB Overview

Standard SRAM, 32KX8, 12ns, CMOS, CDIP28

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	DIP, DIP28,.3
Reach Compliance Code	unknown
Maximum access time	12 ns
I/O type	COMMON
JESD-30 code	R-XDIP-T28
JESD-609 code	e0
memory density	262144 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of terminals	28
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	32KX8
Output characteristics	3-STATE
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP28,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum standby current	0.02 A
Minimum standby current	4.5 V
Maximum slew rate	0.19 mA
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Base Number Matches	1

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