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IS42S16100-8T

Description
Synchronous DRAM, 1MX16, 8ns, CMOS, PDSO50, 0.400 INCH, TSOP2-50
Categorystorage    storage   
File Size648KB,79 Pages
ManufacturerIntegrated Silicon Solution ( ISSI )
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IS42S16100-8T Overview

Synchronous DRAM, 1MX16, 8ns, CMOS, PDSO50, 0.400 INCH, TSOP2-50

IS42S16100-8T Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeTSOP2
package instructionTSOP2, TSOP50,.46,32
Contacts50
Reach Compliance Codecompliant
ECCN codeEAR99
access modeDUAL BANK PAGE BURST
Maximum access time8 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)125 MHz
I/O typeCOMMON
interleaved burst length1,2,4,8
JESD-30 codeR-PDSO-G50
JESD-609 codee0
length20.95 mm
memory density16777216 bit
Memory IC TypeSYNCHRONOUS DRAM
memory width16
Number of functions1
Number of ports1
Number of terminals50
word count1048576 words
character code1000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize1MX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP50,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
refresh cycle2048
Maximum seat height1.2 mm
self refreshYES
Continuous burst length1,2,4,8,FP
Maximum standby current0.002 A
Maximum slew rate0.16 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
Base Number Matches1
IS42S16100
512K Words x 16 Bits x 2 Banks (16-MBIT)
SYNCHRONOUS DYNAMIC RAM
FEATURES
• Clock frequency: 166, 143, 125, 100 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Two banks can be operated simultaneously and
independently
• Dual internal bank controlled by A11 (bank select)
• Single 3.3V power supply
• LVTTL interface
• Programmable burst length
– (1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• Auto refresh, self refresh
• 4096 refresh cycles every 128 ms
• Random column address every clock cycle
• Programmable
CAS
latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and precharge
command
• Byte controlled by LDQM and UDQM
• Package 400-mil 50-pin TSOP II
ISSI
SEPTEMBER 2000
®
DESCRIPTION
ISSI
's 16Mb Synchronous DRAM IS42S16100 is organized
as a 524,288-word x 16-bit x 2-bank for improved
performance. The synchronous DRAMs achieve high-speed
data transfer using pipeline architecture. All inputs and
outputs signals refer to the rising edge of the clock input.
PIN CONFIGURATIONS
50-Pin TSOP (Type II)
VCC
I/O0
I/O1
GNDQ
I/O2
I/O3
VCCQ
I/O4
I/O5
GNDQ
I/O6
I/O7
VCCQ
LDQM
WE
CAS
RAS
CS
A11
A10
A0
A1
A2
A3
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
GND
I/O15
I/O14
GNDQ
I/O13
I/O12
VCCQ
I/O11
I/O10
GNDQ
I/O9
I/O8
VCCQ
NC
UDQM
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
GND
PIN DESCRIPTIONS
A0-A11
A0-A10
A11
A0-A7
I/O0 to I/O15
CLK
CKE
CS
RAS
Address Input
Row Address Input
Bank Select Address
Column Address Input
Data I/O
System Clock Input
Clock Enable
Chip Select
Row Address Strobe Command
CAS
WE
LDQM
UDQM
Vcc
GND
VccQ
GNDQ
NC
Column Address Strobe Command
Write Enable
Lower Bye, Input/Output Mask
Upper Bye, Input/Output Mask
Power
Ground
Power Supply for I/O Pin
Ground for I/O Pin
No Connection
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
09/29/00
1

IS42S16100-8T Related Products

IS42S16100-8T IS42S16100-6T
Description Synchronous DRAM, 1MX16, 8ns, CMOS, PDSO50, 0.400 INCH, TSOP2-50 Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, TSOP2-50
Is it Rohs certified? incompatible incompatible
Parts packaging code TSOP2 TSOP2
package instruction TSOP2, TSOP50,.46,32 TSOP2, TSOP50,.46,32
Contacts 50 50
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
access mode DUAL BANK PAGE BURST DUAL BANK PAGE BURST
Maximum access time 8 ns 5.5 ns
Other features AUTO/SELF REFRESH AUTO/SELF REFRESH
Maximum clock frequency (fCLK) 125 MHz 166 MHz
I/O type COMMON COMMON
interleaved burst length 1,2,4,8 1,2,4,8
JESD-30 code R-PDSO-G50 R-PDSO-G50
JESD-609 code e0 e0
length 20.95 mm 20.95 mm
memory density 16777216 bit 16777216 bit
Memory IC Type SYNCHRONOUS DRAM SYNCHRONOUS DRAM
memory width 16 16
Number of functions 1 1
Number of ports 1 1
Number of terminals 50 50
word count 1048576 words 1048576 words
character code 1000000 1000000
Operating mode SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 70 °C
organize 1MX16 1MX16
Output characteristics 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSOP2 TSOP2
Encapsulate equivalent code TSOP50,.46,32 TSOP50,.46,32
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
power supply 3.3 V 3.3 V
Certification status Not Qualified Not Qualified
refresh cycle 2048 4096
Maximum seat height 1.2 mm 1.2 mm
self refresh YES YES
Continuous burst length 1,2,4,8,FP 1,2,4,8,FP
Maximum standby current 0.002 A 0.002 A
Maximum slew rate 0.16 mA 0.21 mA
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 10.16 mm 10.16 mm
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