TH7110 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Wireless rf/communication> Telecom circuit> TH7110

TH7110: DescriptionTelecom Circuit, 1-Func, PQFP44, LQFP-44; CategoryWireless rf/communication Telecom circuit; File Size651KB，20 Pages; ManufacturerMelexis; Websitehttps://www.melexis.com/zh

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TH7110 Overview

Telecom Circuit, 1-Func, PQFP44, LQFP-44

TH7110 Parametric

Parameter Name	Attribute value
Maker	Melexis
Parts packaging code	QFP
package instruction	,
Contacts	44
Reach Compliance Code	unknown
JESD-30 code	S-PQFP-G44
Number of functions	1
Number of terminals	44
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
Package shape	SQUARE
Package form	FLATPACK
Certification status	Not Qualified
surface mount	YES
Telecom integrated circuit types	TELECOM CIRCUIT
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal location	QUAD
Base Number Matches	1

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315/433MHz FSK/FM/ASK

Double-Conversion Superheterodyne Receiver

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Double superhet architecture for high degree of image rejection

FSK for digital data and FM reception for analog signal transmission

FM/FSK demodulation either with phase-coincidence or PLL demodulator

Low current consumption in active mode and very low standby current

Switchable LNA gain for improved dynamic range

AFC feature allows wide carrier frequency acceptance range

RSSI allows signal strength indication and ASK detection

Surface mount package LQFP44

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Part No.

TH7110

Temperature Range

-40 °C to 85 °C

Package

LQFP44

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General digital and analog 315 MHz or 433 MHz ISM band usage

Low-power telemetry

Alarm and security systems

Keyless car and central locking

Pagers

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Input frequency range: 300 MHz to 500 MHz

Power supply range: 2.3 V to 5.5 V at ASK and 2.5 V to 5.5 V at FSK

Temperature range: -40 °C to +85 °C

Operating current: 6.5 mA at low gain and 7.8 mA at high gain mode

Standby current: 50 nA

with 40 kHz second IF filter BW (incl. SAW front-end filter loss)

Sensitivity: -111 dBm

Sensitivity: -104 dBm with 150 kHz second IF filter BW (incl. SAW front-end filter loss)

Range of first IF: 10 MHz to 80 MHz

Range of second IF: 455 kHz to 21.4 MHz

Maximum input level: –10 dBm at ASK and 0 dBm at FSK

Input impedance: 50

Ω

Image rejection: > 65 dB (e.g. with SAW front-end filter and at 10.7 MHz 2 IF)

Spurious emission: < -70 dBm

Carrier frequency acceptance:

±200

kHz (with AFC active)

RSSI range: 70 dB

Frequency deviation range:

±5

kHz to

±120

kHz

Maximum data rate: 80 kbit/s NRZ

Maximum analog modulation frequency: 15 kHz

8 kHz FSK deviation, BER = 3⋅10 and phase-coincidence demodulation

-3

50 kHz FSK deviation, BER = 3⋅10 and phase-coincidence demodulation

-3

Datasheet Rev 2.1 Dec 2000

Page 1 of 20

www.melexis.com

315/433MHz FSK/FM/ASK

Double-Conversion Superheterodyne Receiver

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The TH7110 receiver IC consists of the following building blocks:

PLL synthesizer (PLL SYNTH) for generation of the first and second local oscillator signals LO1 and LO2

Parts of the PLL SYNTH are the high-frequency VCO1, the feedback dividers DIV_8 and DIV_2,

a phase-frequency detector (PFD) with charge pump (CP) and a crystal-based reference oscillator (RO)

Low-noise amplifier (LNA) for high-sensitivity RF signal reception

First mixer (MIX1) for down-conversion of the RF signal to the first IF (IF1)

second mixer (MIX2) for down-conversion of the IF1 to the second IF (IF2)

IF amplifier (IFA) to amplify and limit the IF2 signal and for RSSI generation

Phase coincidence demodulator (DEMOD) with third mixer (MIX3) to demodulate the IF signal

Operational amplifier (OA) for data slicing, filtering, ASK detection and automatic-frequency control (AFC)

Bias circuitry for bandgap biasing and circuit shutdown

With the TH7110 receiver chip, various circuit configurations can be arranged in order to meet a number of

different customer requirements. For FM/FSK reception the IF tank used in the phase coincidence demodula-

tor can be constituted either by a ceramic resonator or an LC tank (optionally with varactor to create an AFC

circuit). In PLL demodulator configuration, the multiplier MIX3 forms a phase comparator. In ASK configura-

tion, the RSSI signal is feed to an ASK detector, which is constituted by the operational amplifier. The second

VCO (VCO2) can be used either as the VCO of a PLL demodulator or as the LO2 source of a second exter-

nal PLL in a multi-channel system. The following table briefly summarizes the various configurations.

Single-conversion configuration

FM/FSK

ASK

RX with RSSI-based demodulation

narrow-band RX with ceramic demodulation

tank

wide-band RX with LC demod. tank and AFC

Double-conversion configuration

narrow-band RX with ceramic demodulation

tank

wide-band RX with LC demod. tank and AFC

multi-channel RX with ceramic demodulation

tank and external channel synthesizer

RX with RSSI-based demodulation

RX with RSSI-based demodulation and exter-

nal channel synthesizer

extended sensitivity RX with PLL demodulator extended sensitivity RX with PLL demodulator

The preferred superheterodyne configuration is

double conversion

where MIX1 and MIX2 are driven by the

internal local oscillator signals LO1 and LO2, respectively. This allows a

high degree of image rejection,

achieved in conjunction with an RF front-end filter. Efficient RF front-end filtering is realized by using a SAW,

ceramic or helix filter in front of the LNA and by adding a LC filter at the LNA output.

It is also possible to use the TH7110 in

single-conversion

configuration. This can be achieved by switching

the LO2 input of MIX2 from the on-chip PLL synthesizer to the pin IN_MIX2 by means of an internal switch

(done via pin SW_MIX2). Now MIX2 operates as an amplifier for the IF1 signal if an external pull-down resis-

tor at pin IN_MIX2 is added.

The same setting of MIX2 can be used for

multi-channel applications.

In this situation IN_MIX2 must be

driven by an external LO2 signal. This signal can be generated by the VCO2, which is mainly a bipolar tran-

sistor that can be configured as a varactor-tuned VCO. Furthermore, a second external PLL for channel

selection via LO2 tuning is required. This may be arranged by using the Melexis TH7010 PLL synthesizer

chip that can be controlled through a 3-wire bus serial interface. The reference signal for the external PLL

synthesizer can be directly taken from the crystal-based reference oscillator RO.

Datasheet Rev 2.1 Dec 2000

Page 2 of 20

www.melexis.com

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