PLL Based Clock Driver, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 0.150 INCH, SOIC-16
Parameter Name | Attribute value |
Is it Rohs certified? | incompatible |
Maker | ALSC [Alliance Semiconductor Corporation] |
Parts packaging code | SOIC |
package instruction | SOP, |
Contacts | 16 |
Reach Compliance Code | unknown |
Input adjustment | STANDARD |
JESD-30 code | R-PDSO-G16 |
JESD-609 code | e0 |
length | 9.89 mm |
Logic integrated circuit type | PLL BASED CLOCK DRIVER |
Number of functions | 1 |
Number of inverted outputs | |
Number of terminals | 16 |
Actual output times | 8 |
Output characteristics | 3-STATE |
Package body material | PLASTIC/EPOXY |
encapsulated code | SOP |
Package shape | RECTANGULAR |
Package form | SMALL OUTLINE |
Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
Certification status | Not Qualified |
Same Edge Skew-Max(tskwd) | 0.4 ns |
Maximum seat height | 1.73 mm |
Nominal supply voltage (Vsup) | 3.3 V |
surface mount | YES |
technology | CMOS |
Terminal surface | TIN LEAD |
Terminal form | GULL WING |
Terminal pitch | 1.27 mm |
Terminal location | DUAL |
Maximum time at peak reflow temperature | NOT SPECIFIED |
width | 3.9 mm |
minfmax | 133.3 MHz |
Base Number Matches | 1 |