Preliminary
‡
MT9V135: 1/4-Inch VGA SOC Digital Image Sensor
MT9V135
1/4-Inch VGA CMOS
Image Sensor
Limited Data Sheet
A Complete On-Chip VGA Camera Solution with Digital and
Composite Video Output
Micron’s MT9V135 is a VGA-format, sin-
gle-chip camera CMOS active-pixel digital image sensor. It cap-
tures high-quality color images at VGA resolution and
outputs NTSC or PAL interlaced composite video and CCIR 656
digital composite video. The MT9V135 is a complete camera-on-
a-chip solution. It incorporates sophisticated camera functions and
is programmable through a simple two-wire serial interface.
Applications
• Security surveillance cameras
(incl. CCTV)
• Active or passive overlay cameras
• Wireless, smart, and evidence-
quality cameras
• Composite and digital video
Parameters
Optical format
Active imager size
Active pixels
• Supports use of external
devices for addition of custom
overlay graphics
• Image flow processor (IFP) for
sophisticated processing
• Color recovery and correction,
sharpening, gamma, lens
shading correction, and on-
the-fly defect correction
• Automatic features:
auto exposure, auto white
balance (AWB), auto black
reference (ABR), auto flicker
avoidance, auto color
saturation, and auto defect
identification and correction
• Simple two-wire serial
programming interface
NTSC output
PAL output
Features
•
Micron
®
DigitalClarity
®
CMOS
imaging technology
• System-on-a-chip (SOC)—
completely integrated camera
system
• NTSC/PAL (true two-field)
analog composite video output
• ITU-R BT.656 parallel output
(8-bit, interlaced)
• Simultaneous composite and
digital video outputs
(simplifies focus and setup of
network cameras)
• Serial LVDS data output
• Low power, interlaced scan
CMOS image sensor
• Superior low-light
performance
1/4-inch (4:3)
3.63mm(H) x 2.78mm(V)
4.57mm diagonal
640H x 480V
720H x 486V
720H x 576V
Ordering Information
Part Number
MT9V135L12STC ES
MT9V135L12STCD
MT9V135L12STCH
Description
48-Pin LLCC ES, Pb-Free
Demo kit
Demo kit headboard
5.6µm x 5.6µm
RGB paired Bayer pattern
Electronic rolling shutter
(ERS)
Maximum data rate/ 13.5 Mp/s,
master clock
27 MHz
Frame rate – VGA
30 fps at 27 MHz (NTSC)
(640H x 480V)
25 fps at 27 MHz (PAL)
Integration time
16µs–33ms (NTSC)
(composite video)
16µs–40ms (PAL)
ADC resolution
10-bit, on-chip
Responsivity
2.8 V/lux-s (550nm)
Dynamic range
73.4dB
38.8dB
SNR
MAX
Supply I/O digital
2.5V–3.1V (2.8V nominal)
voltage Core digital 2.5V–3.1V (2.8V nominal)
Analog
2.5V–3.1V (2.8V nominal)
Power consumption 344 mW at 2.8V, 25°C
–30°C to +70°C
Operating temp.
1
Packaging
48-pin LLCC
Notes: 1. For a greater temperature range, con-
sider using MT9V125.
Pixel size
Color filter array
Shutter type
©2006 Micron Technology, Inc. All rights reserved.
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by
Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications.
Preliminary
MT9V135: 1/4-Inch VGA SOC Digital Image Sensor Brief
General Description
General Description
The MT9V135 is a VGA CMOS image sensor featuring Micron’s breakthrough DigitalClar-
ity technology—a low-noise CMOS imaging technology that achieves CCD image quality
(based on signal-to-noise ratio and low-light sensitivity) while maintaining the inherent
size, cost, low power, and integration advantages of CMOS.
The MT9V135 performs sophisticated processing functions including color recovery,
color correction, sharpening, programmable gamma correction, auto black reference
clamping, auto exposure, automatic 50Hz/60Hz flicker avoidance, lens shading correc-
tion, auto white balance (AWB), and on-the-fly defect identification and correction.
The MT9V135 outputs interlaced-scan images at 30 or 25 fps, supporting both NTSC and
PAL video formats.
The MT9V135 also includes digital video output that can be switched to the NTSC/PAL
encoder. This can be used in conjunction with an external digital signal processor (DSP)
to provide an overlay (such as a logo or a menu screen) on top of the live video.
The image data can be output on any one of three output ports:
• Composite analog video (single-ended and differential support)
• Low-voltage differential signaling (LVDS)
• CCIR 656 interlaced digital video in parallel 8-bit format
Table 1:
MT9V135 Detailed Performance Parameters
Parameter
Effective fill factor (with microlens)
Output gain
Read noise
Dark current
Value
TBD
28 e-/LSB
6 e-RMS at 16X
119 e-/pix/s at 55°C
Figure 1:
MT9V135 Quantum Efficiency Versus Wavelength
PDF: 09005aef824c99cd/Source: 09005aef824d23dd
MT9V135_PB_2.fm - Rev. A 8/06 EN
2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2006 Micron Technology, Inc. All rights reserved.
Preliminary
MT9V135: 1/4-Inch VGA SOC Digital Image Sensor Brief
Functional Overview
Functional Overview
The MT9V135 is a fully-automatic, single-chip camera, requiring only a single power
supply, lens, and clock source for basic operation. Output video is streamed via the cho-
sen output port. The MT9V135 internal registers are configured using a two-wire serial
interface.
The device can be put into a low-power sleep mode by asserting STANDBY and shutting
down the clock. Output signals can be tri-stated. Both tri-stating output signals and
entry into standby mode can be achieved via two-wire serial interface register writes.
The MT9V135 requires an input clock of 27 MHz to support correct NTSC or PAL timing.
Internal Architecture
Internally, the MT9V135 consists of a sensor core and an image flow processor (IFP). The
IFP is divided in two sections, the color pipe and the camera controller. The sensor core
captures raw images that are then input into the IFP The color pipe section processes
.
the incoming stream to create interpolated, color-corrected output, and the camera
controller section controls the sensor core to maintain the desired exposure and color
balance.
The IFP scales the image and an integrated video encoder generates either NTSC or PAL
analog composite output. The MT9V135 supports three different output ports; analog
composite video out, LVDS serial out and CCIR 656 interlaced digital video in parallel 8-
bit format.
Figure 2 shows the major functional blocks of the MT9V135. The built-in NTSC/PAL
encoder and the LVDS formatter allow simultaneous outputs of composite and digital
video signals. This is especially useful during installation of network cameras and allows
the installer to adjust the camera view and focus using analog monitoring equipment
while the digital video is compressed and formatted for IP network delivery.
Figure 2:
Functional Block Diagram
SCLK
SDATA
Sensor Core
.
640H
x 480V
.
1/4-inch optical format
.
True interlaced readout
.
Auto
black compensation
.
Programmable analog
gain
.
Programmable exposure
.
10-bit ADC
Pixel Data
SRAM
Line Buffers
LVDS Formatter
and Driver
LVDS_OUT_POS
LVDS_OUT_NEG
EXTCLK
STANDBY
Control
Bus
Control
Bus
+
Sensor control
(gains, shutter, etc.)
D
IN
[7:0]
DIN_CLK
NTSC/PAL
Encoder and DAC
DAC_OUT_POS
DAC_OUT_NEG
Image Flow Processor
Camera Control
V
DD
/DGND
VAA
/AGND
VAAPIX
Auto exposure
Auto white
balance
Flicker
detect/avoid
Control
Bus
Image Flow Processor
Colorpipe
Lens shading
correction
Color
interpolation
Defect
correction
Color correction
Horizontal Interpolator
Gamma correction
Color conversion
+ formatting
DOUT0[7:0]
PIXCLK
FRAME_VALID
LINE_VALID
Image Data
PDF: 09005aef824c99cd/Source: 09005aef824d23dd
MT9V135_PB_2.fm - Rev. A 8/06 EN
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2006 Micron Technology, Inc. All rights reserved.
Preliminary
MT9V135: 1/4-Inch VGA SOC Digital Image Sensor Brief
Functional Overview
Figure 3 shows a typical application using a DSP to produce a video overlay (such as a
logo or menu text). The parallel digital video output is sent to the DSP, which adds the
overlay. The digital video with the overlay is then looped back into the MT9V135 to the
NTSC/PAL encoder and LVDS formatter to provide simultaneous composite analog and
digital LVDS outputs.
Figure 3:
Typical Usage Configuration with Overlay
NTSC/PAL
composite
analog output with overlay
D
IN
_CLK
D
IN
[7:0]
PIXCLK
MT9V135
D
OUT
[7:0]
DSP
Parallel
digital
signal with
overlay
(CCIR
656)
Parallel
digital
(CCIR
656)
27MHz
Oscillator
PDF: 09005aef824c99cd/Source: 09005aef824d23dd
MT9V135_PB_2.fm - Rev. A 8/06 EN
4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2006 Micron Technology, Inc. All rights reserved.
Preliminary
MT9V135: 1/4-Inch VGA SOC Digital Image Sensor Brief
Typical Connections
Typical Connections
Figure 4 shows a detailed MT9V135 device configuration. For low-noise operation, the
MT9V135 requires separate analog and digital power supplies. Incoming digital and ana-
log ground conductors can be tied together next to the die.
Power supply voltages V
AA
(the primary analog voltage) and VAAPIX (the main voltage to
the pixel array) must be tied together to avoid current loss.
Both power supply rails should be decoupled to ground using capacitors.
The MT9V135 requires a single external voltage supply level.
Figure 4:
Typical Configuration (without use of overlay)
V
DD
V
DD
_
DAC
V
DD
_
PLL
Power
Power
Power
V
AA AND
VAAPIX
5
Power
1.5KΩ
2
1.5KΩ
2
V
DD
V
DD
_
DAC
V
DD
_
PLL
V
AA
VAAPIX
DAC_POS
DAC_NEG
75Ω Terminated Receiver
S
ADDR
STANDBY
from
Controller
or Digital
GND
Master
Clock
Two-Wire
Serial
Interface
STANDBY
1
CLKIN
S
DATA
SCLK
LVDS_ENABLE
DIN_CLK
DIN[7:0]
HORIZ_FLIP
NTSC_PAL_SELECT
1KΩ
PEDESTAL
RSVD
RESET#
10µF
D
GND
A
GND
DAC_REF
2.8KΩ
LVDS_POS
LVDS_NEG
D
OUT
[7:0]
D
OUT
_LSB[1:0]
PIXCLK
LINE_VALID
FRAME_VALID
D
GND
A
GND
V
DD
VAAPIX
V
AA
0.1µF
1µF
0.1µF
1µF
0.1µF
1µF
D
GND
A
GND
A
GND
Notes: 1. MT9V135 STANDBY can be connected directly to the customer’s ASIC controller or to D
GND
,
depending on the controller’s capability.
2. A 1.5KΩ resistor value is recommended, but may be greater for slower (e.g., 100Kb) two-
wire speed.
3. LVDS_ENABLE should be tied HIGH if LVDS is to be used.
4. Pull down DAC_REF with a 2.8KΩ resistor for 1.0V peak-to-peak video output. For a 1.4V
peak-to-peak video output, change the video resistor to 2.4KΩ.
5. V
AA
and VAAPIX must be tied to the same potential for proper operation.
PDF: 09005aef824c99cd/Source: 09005aef824d23dd
MT9V135_PB_2.fm - Rev. A 8/06 EN
5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2006 Micron Technology, Inc. All rights reserved.
75Ω
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MCU
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