Logic Gates Hi Spd CMOS Quad 2- Input NAND
| Parameter Name | Attribute value |
| Is it lead-free? | Lead free |
| Is it Rohs certified? | conform to |
| Maker | Texas Instruments |
| Parts packaging code | SOIC |
| package instruction | SOP, SOP14,.25 |
| Contacts | 14 |
| Reach Compliance Code | unknow |
| series | HC/UH |
| JESD-30 code | R-PDSO-G14 |
| JESD-609 code | e4 |
| length | 8.65 mm |
| Load capacitance (CL) | 50 pF |
| Logic integrated circuit type | NAND GATE |
| MaximumI(ol) | 0.004 A |
| Humidity sensitivity level | 1 |
| Number of functions | 4 |
| Number of entries | 2 |
| Number of terminals | 14 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| Output characteristics | OPEN-DRAIN |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | SOP |
| Encapsulate equivalent code | SOP14,.25 |
| Package shape | RECTANGULAR |
| Package form | SMALL OUTLINE |
| method of packing | TAPE AND REEL |
| Peak Reflow Temperature (Celsius) | 260 |
| power supply | 2/6 V |
| Prop。Delay @ Nom-Su | 30 ns |
| propagation delay (tpd) | 150 ns |
| Certification status | Not Qualified |
| Schmitt trigger | NO |
| Maximum seat height | 1.75 mm |
| Maximum supply voltage (Vsup) | 6 V |
| Minimum supply voltage (Vsup) | 2 V |
| Nominal supply voltage (Vsup) | 4.5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal surface | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Terminal form | GULL WING |
| Terminal pitch | 1.27 mm |
| Terminal location | DUAL |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 3.9 mm |
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