74HC1G32GV-Q100,125 datasheet, PDF

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74HC1G32GV-Q100,125: DescriptionOR Gate, HC/UH Series, 1-Func, 2-Input, CMOS, PDSO5; Categorylogic logic; File Size101KB，12 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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74HC1G32GV-Q100,125 Overview

OR Gate, HC/UH Series, 1-Func, 2-Input, CMOS, PDSO5

74HC1G32GV-Q100,125 Parametric

Parameter Name	Attribute value
Maker	NXP
package instruction	SSOP,
Reach Compliance Code	unknown
series	HC/UH
JESD-30 code	R-PDSO-G5
length	2.9 mm
Logic integrated circuit type	OR GATE
Number of functions	1
Number of entries	2
Number of terminals	5
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
propagation delay (tpd)	135 ns
Filter level	AEC-Q100
Maximum seat height	1.9 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	GULL WING
Terminal pitch	0.95 mm
Terminal location	DUAL
width	1.5 mm

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74HC1G32-Q100; 74HCT1G32-Q100

2-input OR gate

Rev. 1 — 8 August 2012

Product data sheet

1. General description

74HC1G32-Q100 and 74HCT1G32-Q100 are high-speed Si-gate CMOS devices. They

provide a 2-input OR function.

The standard output currents are half of those of the 74HC32-Q100 and 74HCT32-Q100.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits



Automotive product qualification in accordance with AEC-Q100 (Grade 1)



Specified from

40 C

to +85

C

and from

40 C

to +125

C



Input levels:



For 74HC1G32-Q100: CMOS level



For 74HCT1G32-Q100: TTL level



Symmetrical output impedance



High noise immunity



Low power dissipation



Balanced propagation delays



ESD protection:



MIL-STD-883, method 3015 exceeds 2000 V



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0

)



SOT353-1 and SOT753 package options

3. Ordering information

Table 1.

Ordering information

Package

Temperature range

74HC1G32GW-Q100

74HCT1G32GW-Q100

74HC1G32GV-Q100

74HCT1G32GV-Q100

40 C

to +125

C

SC-74A

40 C

to +125

C

Name

TSSOP5

Description

plastic thin shrink small outline package; 5 leads;

body width 1.25 mm

plastic surface-mounted package; 5 leads

Version

SOT353-1

SOT753

Type number

74HC1G32GV-Q100,125 Related Products

	74HC1G32GV-Q100,125	74HC1G32GW-Q100,125	74HCT1G32GV-Q100,125	74HCT1G32GW-Q100,125	935299229125	935299231125
Description	OR Gate, HC/UH Series, 1-Func, 2-Input, CMOS, PDSO5	OR Gate, HC/UH Series, 1-Func, 2-Input, CMOS, PDSO5	OR Gate, HCT Series, 1-Func, 2-Input, CMOS, PDSO5	OR Gate, HCT Series, 1-Func, 2-Input, CMOS, PDSO5	HCT SERIES, 2-INPUT OR GATE, PDSO5, PLASTIC, SOT-753, SC-74A, 5 PIN	HCT SERIES, 2-INPUT OR GATE, PDSO5, 1.25 MM, PLASTIC, MO-203, SC-88A, SOT353-1,TSSOP-5
Maker	NXP	NXP	NXP	NXP	NXP	NXP
package instruction	SSOP,	TSSOP,	SSOP,	TSSOP,	SSOP,	TSSOP,
Reach Compliance Code	unknown	unknown	unknown	unknown	unknow	unknow
series	HC/UH	HC/UH	HCT	HCT	HCT	HCT
JESD-30 code	R-PDSO-G5	R-PDSO-G5	R-PDSO-G5	R-PDSO-G5	R-PDSO-G5	R-PDSO-G5
length	2.9 mm	2.05 mm	2.9 mm	2.05 mm	2.9 mm	2.05 mm
Logic integrated circuit type	OR GATE	OR GATE	OR GATE	OR GATE	OR GATE	OR GATE
Number of functions	1	1	1	1	1	1
Number of entries	2	2	2	2	2	2
Number of terminals	5	5	5	5	5	5
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	TSSOP	SSOP	TSSOP	SSOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	135 ns	135 ns	27 ns	27 ns	27 ns	27 ns
Filter level	AEC-Q100	AEC-Q100	AEC-Q100	AEC-Q100	AEC-Q100	AEC-Q100
Maximum seat height	1.9 mm	1.1 mm	1.9 mm	1.1 mm	1.9 mm	1.1 mm
Maximum supply voltage (Vsup)	6 V	6 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	2 V	2 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.95 mm	0.65 mm	0.95 mm	0.65 mm	0.95 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
width	1.5 mm	1.25 mm	1.5 mm	1.25 mm	1.5 mm	1.25 mm

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