Fixed Positive LDO Regulator, 2 Output, 3.5V1, 1.5V2, CMOS, PDSO6, USP-6
Parameter Name | Attribute value |
Maker | LRC |
package instruction | USP-6 |
Reach Compliance Code | unknown |
Maximum drop-back voltage 1 | 0.3 V |
Maximum drop-back voltage 2 | 0.3 V |
Maximum input voltage | 8 V |
Minimum input voltage | 4 V |
JESD-30 code | R-PDSO-N6 |
length | 2 mm |
Number of functions | 1 |
Output times | 2 |
Number of terminals | 6 |
Maximum output voltage 1 | 3.57 V |
Minimum output voltage 1 | 3.43 V |
Nominal output voltage 1 | 3.5 V |
Maximum output voltage 2 | 1.53 V |
Minimum output voltage 2 | 1.47 V |
Nominal output voltage 2 | 1.5 V |
Package body material | PLASTIC/EPOXY |
encapsulated code | HTSON |
Package shape | RECTANGULAR |
Package form | SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE |
Regulator type | FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR |
Maximum seat height | 0.8 mm |
surface mount | YES |
technology | CMOS |
Terminal form | NO LEAD |
Terminal location | DUAL |
width | 1.8 mm |
Base Number Matches | 1 |