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IDT2305B_09

Description
2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
Categorysemiconductor    logic   
File Size153KB,10 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet Parametric Compare View All

IDT2305B_09 Overview

2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8

IDT2305B_09 Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals8
Minimum operating temperature0.0 Cel
Maximum operating temperature70 Cel
Rated supply voltage3.3
Minimum supply/operating voltage3 V
Maximum supply/operating voltage3.6 V
Processing package descriptionGREEN, SOIC-8
each_compliYes
EU RoHS regulationsYes
stateActive
Logic IC typePLL BASED CLOCK DRIVER
sub_categoryClock Drivers
series2305
Max-Min frequency133 MHz
Enter conditionsSTANDARD
jesd_30_codeR-PDSO-G8
jesd_609_codee3
max_i_ol_0.0120 Amp
moisture_sensitivity_level1
Number of inverted outputs0.0
Real output number4
Output characteristics3-STATE
Packaging MaterialsPLASTIC/EPOXY
ckage_codeSOP
ckage_equivalence_codeSOP8,.25
packaging shapeRECTANGULAR
Package SizeSMALL OUTLINE
eak_reflow_temperature__cel_260
wer_supplies__v_3.3
qualification_statusCOMMERCIAL
Maximum same-side bending0.2500 ns
seated_height_max1.72 mm
surface mountYES
Temperature levelCOMMERCIAL
terminal coatingMATTE TIN
Terminal formGULL WING
Terminal spacing1.27 mm
Terminal locationDUAL
ime_peak_reflow_temperature_max__s_30
length4.9 mm
width3.9 mm
IDT2305B
3.3V ZERO DELAY CLOCK BUFFER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
3.3V ZERO DELAY
CLOCK BUFFER
FEATURES:
IDT2305B
Phase-Lock Loop Clock Distribution
10MHz to 133MHz operating frequency
Distributes one clock input to one bank of five outputs
Zero Input-Output Delay
Output Skew < 250ps
Low jitter <175 ps cycle-to-cycle
50ps typical cycle-to-cycle jitter (15pF, 66MHz)
IDT2305B-1 for Standard Drive
IDT2305B-1H for High Drive
No external RC network required
Operates at 3.3V V
DD
Power down mode
Available in SOIC and TSSOP packages
DESCRIPTION:
NOTE: EOL for non-green parts to occur on 5/13/10 per
PDN U-09-01
The IDT2305B is a high-speed phase-lock loop (PLL) clock buffer,
designed to address high-speed clock distribution applications. The zero
delay is achieved by aligning the phase between the incoming clock and
the output clock, operable within the range of 10 to 133MHz.
The IDT2305B is an 8-pin version of the IDT2309B. IDT2305B accepts
one reference input, and drives out five low skew clocks. The -1H version
of this device operates, up to 133MHz frequency and has a higher drive
than the -1 device. All parts have on-chip PLLs which lock to an input clock
on the REF pin. The PLL feedback is on-chip and is obtained from the
CLKOUT pad. In the absence of an input clock, the IDT2305B enters power
down. In this mode, the device will draw less than 25
µA,
the outputs are
tri-stated, and the PLL is not running, resulting in a significant reduction of
power.
The IDT2305B is characterized for both Industrial and Commercial
operation.
FUNCTIONAL BLOCK DIAGRAM
8
CLKOUT
REF
1
PLL
Control
Logic
3
CLK1
2
CLK2
5
CLK3
7
CLK4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
c
2007
Integrated Device Technology, Inc.
AUGUST 2009
DSC 6994/5

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Number of functions 1 1 1 1 1
Number of terminals 8 8 8 8 8
Minimum operating temperature 0.0 Cel 0.0 Cel 0.0 Cel 0.0 Cel 0.0 Cel
Maximum operating temperature 70 Cel 70 Cel 70 Cel 70 Cel 70 Cel
Rated supply voltage 3.3 3.3 3.3 3.3 3.3
Minimum supply/operating voltage 3 V 3 V 3 V 3 V 3 V
Maximum supply/operating voltage 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
Processing package description GREEN, SOIC-8 GREEN, SOIC-8 GREEN, SOIC-8 GREEN, SOIC-8 GREEN, SOIC-8
each_compli Yes Yes Yes Yes Yes
EU RoHS regulations Yes Yes Yes Yes Yes
state Active Active Active Active Active
Logic IC type PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER
sub_category Clock Drivers Clock Drivers Clock Drivers Clock Drivers Clock Drivers
series 2305 2305 2305 2305 2305
Max-Min frequency 133 MHz 133 MHz 133 MHz 133 MHz 133 MHz
Enter conditions STANDARD STANDARD STANDARD STANDARD STANDARD
jesd_30_code R-PDSO-G8 R-PDSO-G8 R-PDSO-G8 R-PDSO-G8 R-PDSO-G8
jesd_609_code e3 e3 e3 e3 e3
max_i_ol_ 0.0120 Amp 0.0120 Amp 0.0120 Amp 0.0120 Amp 0.0120 Amp
moisture_sensitivity_level 1 1 1 1 1
Number of inverted outputs 0.0 0.0 0.0 0.0 0.0
Real output number 4 4 4 4 4
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Packaging Materials PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
ckage_code SOP SOP SOP SOP SOP
ckage_equivalence_code SOP8,.25 SOP8,.25 SOP8,.25 SOP8,.25 SOP8,.25
packaging shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package Size SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
eak_reflow_temperature__cel_ 260 260 260 260 260
wer_supplies__v_ 3.3 3.3 3.3 3.3 3.3
qualification_status COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Maximum same-side bending 0.2500 ns 0.2500 ns 0.2500 ns 0.2500 ns 0.2500 ns
seated_height_max 1.72 mm 1.72 mm 1.72 mm 1.72 mm 1.72 mm
surface mount YES YES YES YES YES
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
terminal coating MATTE TIN MATTE TIN MATTE TIN MATTE TIN MATTE TIN
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal spacing 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL DUAL
ime_peak_reflow_temperature_max__s_ 30 30 30 30 30
length 4.9 mm 4.9 mm 4.9 mm 4.9 mm 4.9 mm
width 3.9 mm 3.9 mm 3.9 mm 3.9 mm 3.9 mm

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