LXT363PE datasheet, PDF - EEWORLD Datasheet

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LXT363PE: DescriptionPCM Transceiver, 1-Func, PQCC28, PLASTIC, LCC-28; CategoryWireless rf/communication Telecom circuit; File Size832KB，44 Pages; ManufacturerInphi Corporation

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LXT363PE Overview

PCM Transceiver, 1-Func, PQCC28, PLASTIC, LCC-28

LXT363PE Parametric

Parameter Name	Attribute value
Maker	Inphi Corporation
package instruction	QCCJ,
Reach Compliance Code	compliant
JESD-30 code	S-PQCC-J28
length	11.5062 mm
Number of functions	1
Number of terminals	28
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Certification status	Not Qualified
Maximum seat height	4.572 mm
Nominal supply voltage	5 V
surface mount	YES
Telecom integrated circuit types	PCM TRANSCEIVER
Temperature level	INDUSTRIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
width	11.5062 mm
Base Number Matches	1

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LXT363

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications

Datasheet

The LXT363 is a fully integrated, combination transceiver for T1 ISDN Primary Rate Interface

and general T1 long and short haul applications. The device operates over 22 AWG twisted-pair

cables from 0 to 6 kft and offers Line Build Outs and pulse equalization settings for all T1 Line

Interface Unit (LIU) applications.

The LXT363 features an Intel or Motorola compatible parallel port for microprocessor control.

The LXT363 incorporates advanced crystal-less digital jitter attenuation in either the transmit or

receive data path starting at 3 Hz. B8ZS encoding/decoding and unipolar or bipolar data I/O are

available. The LIU provides loss of signal monitoring and a variety of diagnostic loopback

modes.

The parallel port is ideal for applications with multiple T1 interfaces.

Applications

ISDN Primary Rate Interface (ISDN PRI)

CSU/NTU interface to T1 Service

T1 LAN/WAN bridge/routers

T1 Mux; Channel Banks

Digital Loop Carrier - Subscriber Carrier

Systems

Product Features

Fully integrated transceiver for Long or

Short-Haul T1 interfaces

Crystal-less digital jitter attenuation

— Select either transmit or receive path

— No crystal or high speed external clock

required

Meets or exceeds specifications in ANSI

T1.102, T1.403 and T1.408; and AT&T

Pub 62411

Supports 100

Ω

(T1 twisted-pair)

applications

Selectable receiver sensitivity – fully

restores the received signal after

transmission through a cable with

attenuation of either 0 to 26 dB, or 0 to

36 dB @ 772 kHz

Five Pulse Equalization Settings for T1

Short-Haul applications

Four Line Build-Outs for T1 long-haul

applications from 0 dB to -22.5 dB

Transmit/receive performance monitors

with Driver Fail Monitor Open and Loss of

Signal outputs

Selectable unipolar or bipolar data I/O and

B8ZS encoding/decoding

Line attenuation indication output in 2.9 dB

steps

QRSS generator/detector for testing or

monitoring

Local, remote, and analog loopback, plus

in-band network loopback code generation

and detection

Intel/Motorola compatible 8-bit parallel

interface for microprocessor control

Available in 28-pin PLCC, 44-pin PQFP

and 44-pin LQFP packages

As of January 15, 2001, this document replaces the Level One document

Order Number: 249034-001

known as

LXT363 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications.

January 2001

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT363

Contents

1.0

2.0

Pin Assignments and Signal Descriptions

...................................................... 8

1.1

2.1

2.2

Mode Dependent Signals ...................................................................................... 9

Initialization..........................................................................................................13

2.1.1 Reset Operation .....................................................................................13

Transmitter ..........................................................................................................13

2.2.1 Transmit Digital Data Interface...............................................................13

2.2.2 Transmit Monitoring................................................................................13

2.2.3 Transmit Drivers .....................................................................................14

2.2.4 Transmit Idle Mode.................................................................................14

2.2.5 Transmit Pulse Shape ............................................................................14

Receiver ..............................................................................................................14

2.3.1 Receive Equalizer ..................................................................................14

2.3.2 Receive Data Recovery..........................................................................15

2.3.3 Receiver Monitor Mode ..........................................................................15

Jitter Attenuation .................................................................................................15

Diagnostic Mode Operation.................................................................................16

2.5.1 Loopback Modes ....................................................................................16

2.5.1.1 Local Loopback .........................................................................16

2.5.1.2 Analog Loopback.......................................................................18

2.5.1.3 Remote Loopback .....................................................................18

2.5.1.4 Network Loopback.....................................................................19

2.5.1.5 Dual Loopback ..........................................................................19

2.5.2 Internal Pattern Generation and Detection.............................................20

2.5.2.1 Transmit All Ones ......................................................................20

2.5.2.2 Quasi-Random Signal Source (QRSS) .....................................20

2.5.2.3 In-Band Network Loop Up or Down Code Generator ................21

2.5.3 Error Insertion and Detection .................................................................21

2.5.3.1 Bipolar Violation Insertion (INSBPV) .........................................21

2.5.3.2 Logic Error Insertion (INSLER)..................................................22

2.5.3.3 Bipolar Violation Detection (BPV)..............................................22

2.5.4 Alarm Condition Monitoring ....................................................................22

2.5.4.1 Loss of Signal ............................................................................22

2.5.4.2 Alarm Indication Signal Detection .............................................22

2.5.4.3 Driver Failure Open Mode .........................................................22

2.5.4.4 Elastic Store Overflow/Underflow ..............................................23

2.5.5 Other Diagnostic Reports .......................................................................23

2.5.5.1 Receive Line Attenuation Indication ..........................................23

2.5.5.2 Built-In Self Test ........................................................................23

Parallel Microprocessor Interface........................................................................23

2.6.1 Interrupt Handling...................................................................................24

Functional Description

...........................................................................................13

2.3

2.4

2.5

2.6

3.0

4.0

.................................................................................................25

Application Information

.........................................................................................30

4.1

4.2

Transmit Return Loss ..........................................................................................30

Transformer Data ................................................................................................30

Datasheet

LXT363 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications

4.3

Application Circuits.............................................................................................. 30

5.0

6.0

Test Specifications

.................................................................................................. 33

Mechanical Specifications

................................................................................... 41

Figures

LXT363 Block Diagram ......................................................................................... 7

LXT363 Pin Assignments...................................................................................... 8

50% Duty Cycle Coding ...................................................................................... 14

TAOS with LLOOP .............................................................................................. 17

Local Loopback ................................................................................................... 17

Analog Loopback ................................................................................................ 18

Remote Loopback ............................................................................................... 19

Dual Loopback .................................................................................................... 19

TAOS Data Path ................................................................................................. 20

QRSS Mode ........................................................................................................ 20

Typical LXT363 Application................................................................................. 32

1.544 MHz T1 Pulse (DS1 and DSX-1) (See

Table 23)

...................................... 35

Transmit Clock Timing ........................................................................................ 36

Receive Clock Timing ......................................................................................... 37

LXT363 I/O Timing Diagram for Intel Address/Data Bus .................................... 38

LXT363 I/O Timing Diagram for Motorola Address/Data Bus ............................. 39

Typical T1 Jitter Tolerance at 36 dB ................................................................... 39

T1 Jitter Attenuation ............................................................................................ 40

Plastic Leaded Chip Carrier Package Specifications .......................................... 41

Plastic Quad Flat Package Specifications........................................................... 42

Low-Profile Quad Flat Package Specifications ................................................... 43

Datasheet

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT363

Tables

LXT363 Clock and Data Pin Assignments by Mode1............................................ 9

LXT363 Processor Interface Pins.......................................................................... 9

LXT363 Signal Descriptions ................................................................................10

Diagnostic Mode Summary .................................................................................16

Control Register #1 Read/Write, Address (A7-A0) = x010000x ..........................26

Equalizer Control Bit Settings..............................................................................26

Control Register #2 Read/Write, Address (A7-A0) = x010001x ..........................27

Control Register #3 Read/Write, Address (A7-A0) = x010010x ..........................27

Interrupt Clear Register Read/Write, Address (A7-A0) = x010011x....................28

Transition Status Register Read Only, Address (A7-A0) = x010100x.................28

Performance Status Register Read Only, Address (A7-A0) = x010101x ............29

Equalizer Status Register Read Only, Address (A7-A0) = x010110x .................29

Control Register #4 Read/Write, Address (A7-A0) = x010111x ..........................29

Transmit Return Loss ..........................................................................................30

Transformer Specifications for LXT363...............................................................30

Recommended Transformers for LXT363...........................................................31

Absolute Maximum Ratings.................................................................................33

Recommended Operating Conditions .................................................................33

Digital Characteristics..........................................................................................34

Analog Characteristics ........................................................................................34

1.544 MHz T1 Pulse Mask Corner Point Specifications......................................35

Master and Transmit Clock Timing Characteristics (See

Figure 13)...................35

Receive Timing Characteristics (See

Figure 14).................................................36

LXT363 20 MHz Intel Bus Parallel I/O Timing Characteristics

(See

Figure 15)

...................................................................................................37

LXT363 16.78 MHz Motorola Bus Parallel I/O Timing Characteristics

(See

Figure 16)

...................................................................................................38

Datasheet

LXT363PE Related Products

	LXT363PE	LXT363LE	LXT363QE
Description	PCM Transceiver, 1-Func, PQCC28, PLASTIC, LCC-28	PCM Transceiver, 1-Func, PQFP44, LQFP-44	PCM Transceiver, 1-Func, PQFP44, PLASTIC, QFP-44
Maker	Inphi Corporation	Inphi Corporation	Inphi Corporation
package instruction	QCCJ,	LQFP,	QFP,
Reach Compliance Code	compliant	compliant	compliant
JESD-30 code	S-PQCC-J28	S-PQFP-G44	S-PQFP-G44
length	11.5062 mm	10 mm	10 mm
Number of functions	1	1	1
Number of terminals	28	44	44
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	LQFP	QFP
Package shape	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER	FLATPACK, LOW PROFILE	FLATPACK
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.572 mm	1.6 mm	2.45 mm
Nominal supply voltage	5 V	5 V	5 V
surface mount	YES	YES	YES
Telecom integrated circuit types	PCM TRANSCEIVER	PCM TRANSCEIVER	PCM TRANSCEIVER
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	J BEND	GULL WING	GULL WING
Terminal pitch	1.27 mm	0.8 mm	0.8 mm
Terminal location	QUAD	QUAD	QUAD
width	11.5062 mm	10 mm	10 mm
Base Number Matches	1	1	1

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