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R5105N321A-TR-F

Description
Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO6, ROHS COMPLIANT, SOT-23, 6 PIN
CategoryPower/power management    The power supply circuit   
File Size249KB,2 Pages
ManufacturerRICOH Electronic Devices Co., Ltd.
Environmental Compliance  
Download Datasheet Parametric View All

R5105N321A-TR-F Overview

Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO6, ROHS COMPLIANT, SOT-23, 6 PIN

R5105N321A-TR-F Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerRICOH Electronic Devices Co., Ltd.
Parts packaging codeSOT-23
package instructionLSSOP,
Contacts6
Reach Compliance Codeunknown
ECCN codeEAR99
Other featuresDETECTOR THRESHOLD VOLTAGE IS 3.2V
Adjustable thresholdNO
Analog Integrated Circuits - Other TypesPOWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 codeR-PDSO-G6
JESD-609 codee6
length2.9 mm
Number of channels1
Number of functions1
Number of terminals6
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeLSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, LOW PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1.4 mm
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)0.9 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Bismuth (Sn/Bi)
Terminal formGULL WING
Terminal pitch0.95 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width1.6 mm
Base Number Matches1
R5105N Series
Compact Watchdog Timer with VD
The R5105N Series are CMOS-based system power ICs with a voltage detector (VD) and watchdog timer (WDT) integrated in a single
chip. R5105N monitors the power system of devices equipped with microprocessors and prevents system runaway with a reset
signal when a malfunction occurs. The output delay time of the VD and watchdog timeout period/reset time can be adjusted high
accuracy with an external capacitor.
FEATURES
Supply Current (I
SS
) ························Typ. 11μA (V
DD
=-V
DET
+0.5V,
Operating Voltage Range (V
DD
) ······0.9V to 6.0V
Clock pulse input)
Output Delay Time (t
PLH
)················· Typ. 370ms (C
D
=0.1μF)
Output Delay Time Accuracy··········
±
16% (-40°C
<
Topt
<
105°C)
=
=
(WDT Section)
Watchdog Timeout Period (t
WD
)······ Typ. 310ms (C
TW
=0.1μF)
(VD Section)
Detector Threshold Range (-V
DET
) ···1.5V to 5.5V (internally fixed)
Reset Hold Time of WDT (t
WR
) ······· Typ. 34ms (C
TW
=0.1μF)
Detector Threshold Accuracy ··········± 1%
Watchdog Timeout Period Accuracy ····
±
33% (-40°C
<
Topt
<
105°C)
=
=
Temp. coeff. of Detector Threshold ···Typ.
±
100ppm/°C
Package ········································· SOT-23-6
(The above shows specification at Topt=25
°
C. Design assurance value at -40
°
C
<
Topt
<
105
°
C is also available. For details, please refer to the datasheet.)
=
=
BLOCK DIAGRAMS
R5105Nxx1A
(Nch. open drain output)
V
DD
3
C
D
6
V
DD
3
C
D
6
TYPICAL APPLICATION
R5105Nxx1C
(CMOS output)
Power Supply
Microprocessor
V
DD
R
Vref2
Vref1
Vref2
3
V
DD
Vref1
RESETB
4
R5105Nxx1A
Series
SCK
RESET
I/O
C
TW
2
WATCHDOG
TIMER
CLOCK
DETECTOR
5 GND
1 SCK
C
TW
2
WATCHDOG
TIMER
CLOCK
DETECTOR
5 GND
1 SCK
C
D
1
2
6
C
D
GND
C
TW
RESETB 4
RESETB 4
5
C
TW
SELECTION GUIDE
Package
SOT-23-6
Quantity per Reel
3,000 pcs
Part No.
R5105N.xx.1.
-TR-F
.xx.
: Specify the detector threshold within the range 1.5V (.15.) to 5.5V (.55.)
in 0.1V steps.
: Select the output type from (.A.) Nch. open drain or (.C.) CMOS.
.∗
PACKAGE (Top View)
SOT-23-6
6
5
4
TIMING CHART
V
DD
+V
DET
-V
DET
t
PHL
t
PHL
V
CD
+V
TCD
1
2
3
-V
TCD
t
WD
t
WDI
1
2
3
4
5
6
SCK
C
TW
V
DD
RESETB
GND
C
D
Watchdog timer clock input pin
Ext. Cap. pin for setting reset and
watchdog timeout period of WDT
Power supply pin
Output pin for Reset "L" signal
Ground pin
Ext. Cap. pin for setting output
delay time of VD
V
ref2H
V
CTW
V
ref2L
t
PLH
t
PLH
V
SCK
t
WR
V
RESETB
APPLICATION
Monitoring of the power system of devices equipped with microprocessors
No.EK-159-091101
∗t
PHL
: Output delay time
∗t
WDI
: t
WD
/10 (SCK pulses input during this period are ignored.)
CMOS Microprocessor Supervisory

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