V53C16256LT45 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > storage> storage> V53C16256LT45

V53C16256LT45: DescriptionFast Page DRAM, 256KX16, 45ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, TSOP2-44/40; Categorystorage storage; File Size261KB，18 Pages; ManufacturerMosel Vitelic Corporation ( MVC ); Websitehttp://www.moselvitelic.com

Download Datasheet Parametric Compare View All

V53C16256LT45 Overview

Fast Page DRAM, 256KX16, 45ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, TSOP2-44/40

V53C16256LT45 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Mosel Vitelic Corporation ( MVC )
Parts packaging code	TSOP2
package instruction	TSOP2, TSOP40/44,.46,32
Contacts	44
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	FAST PAGE
Maximum access time	45 ns
Other features	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O type	COMMON
JESD-30 code	R-PDSO-G40
JESD-609 code	e0
length	18.41 mm
memory density	4194304 bit
Memory IC Type	FAST PAGE DRAM
memory width	16
Number of functions	1
Number of ports	1
Number of terminals	40
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256KX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Encapsulate equivalent code	TSOP40/44,.46,32
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Certification status	Not Qualified
refresh cycle	512
Maximum seat height	1.2 mm
self refresh	NO
Maximum standby current	0.0001 A
Maximum slew rate	0.1 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10.16 mm
Base Number Matches	1

Preview

Download Datasheet

View All

MOSEL VITELIC

V53C16256L

3.3 VOLT 256K X 16 FAST PAGE MODE

CMOS DYNAMIC RAM

PRELIMINARY

HIGH PERFORMANCE

Max. RAS Access Time, (t

RAC

)

Max. Column Address Access Time, (t

CAA

)

Min. Fast Page Mode Cycle Time, (t

)

Min. Read/Write Cycle Time, (t

)

40 ns

20 ns

23 ns

75 ns

45 ns

22 ns

25 ns

80 ns

50 ns

24 ns

28 ns

90 ns

60 ns

30 ns

35 ns

110 ns

Features

256K x 16-bit organization

Fast Page Mode for a sustained data rate

of 43 MHz

RAS access time: 40, 45, 50, 60 ns

Dual CAS Inputs

Low power dissipation

Read-Modify-Write, RAS-Only Refresh,

CAS-Before-RAS Refresh

Refresh Interval: 512 cycles/8 ms

Available in 40-pin 400 mil SOJ and

40/44L-pin 400 mil TSOP-II packages

Single +3.3V

0.3V Power Supply

TTL Interface

Description

The V53C16256L is a 262,144 x 16 bit high-per-

formance CMOS dynamic random access memory.

The V53C16256L offers Fast Page mode with dual

CAS inputs. An address, CAS and RAS input ca-

pacitances are reduced to one quarter when the x4

DRAM is used to construct the same memory den-

sity. The V53C16256L has symmetric address and

accepts 512 cycle 8ms interval.

All inputs are TTL compatible. Fast Page Mode

operation allows random access up to 512 x 16 bits,

within a page, with cycle times as short as 23ns.

The V53C16256L is best suited for graphics, and

DSP applications.

Device Usage Chart

Operating

Temperature

Range

C to 70

Package Outline

•

Access Time (ns)

•

Power

Std.

•

Temperature

Mark

Blank

V53C16256L Rev. 2.4 December 1997

V53C16256LT45 Related Products

	V53C16256LT45	V53C16256LK45	V53C16256LT60	V53C16256LK60	V53C16256LT40	V53C16256LK50	V53C16256LT50
Description	Fast Page DRAM, 256KX16, 45ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, TSOP2-44/40	Fast Page DRAM, 256KX16, 45ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, SOJ-40	Fast Page DRAM, 256KX16, 60ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, TSOP2-44/40	Fast Page DRAM, 256KX16, 60ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, SOJ-40	Fast Page DRAM, 256KX16, 40ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, TSOP2-44/40	Fast Page DRAM, 256KX16, 50ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, SOJ-40	Fast Page DRAM, 256KX16, 50ns, CMOS, PDSO40, 0.400 INCH, PLASTIC, TSOP2-44/40
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	Mosel Vitelic Corporation ( MVC )	Mosel Vitelic Corporation ( MVC )	Mosel Vitelic Corporation ( MVC )	Mosel Vitelic Corporation ( MVC )	Mosel Vitelic Corporation ( MVC )	Mosel Vitelic Corporation ( MVC )	Mosel Vitelic Corporation ( MVC )
Parts packaging code	TSOP2	SOJ	TSOP2	SOJ	TSOP2	SOJ	TSOP2
package instruction	TSOP2, TSOP40/44,.46,32	SOJ, SOJ40,.44	TSOP2, TSOP40/44,.46,32	SOJ, SOJ40,.44	TSOP2, TSOP40/44,.46,32	SOJ, SOJ40,.44	TSOP2, TSOP40/44,.46,32
Contacts	44	40	44	40	44	40	44
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	FAST PAGE	FAST PAGE	FAST PAGE	FAST PAGE	FAST PAGE	FAST PAGE	FAST PAGE
Maximum access time	45 ns	45 ns	60 ns	60 ns	40 ns	50 ns	50 ns
Other features	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	R-PDSO-G40	R-PDSO-J40	R-PDSO-G40	R-PDSO-J40	R-PDSO-G40	R-PDSO-J40	R-PDSO-G40
JESD-609 code	e0	e0	e0	e0	e0	e0	e0
length	18.41 mm	26.035 mm	18.41 mm	26.035 mm	18.41 mm	26.035 mm	18.41 mm
memory density	4194304 bit	4194304 bit	4194304 bit	4194304 bit	4194304 bit	4194304 bit	4194304 bit
Memory IC Type	FAST PAGE DRAM	FAST PAGE DRAM	FAST PAGE DRAM	FAST PAGE DRAM	FAST PAGE DRAM	FAST PAGE DRAM	FAST PAGE DRAM
memory width	16	16	16	16	16	16	16
Number of functions	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1
Number of terminals	40	40	40	40	40	40	40
word count	262144 words	262144 words	262144 words	262144 words	262144 words	262144 words	262144 words
character code	256000	256000	256000	256000	256000	256000	256000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	256KX16	256KX16	256KX16	256KX16	256KX16	256KX16	256KX16
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSOP2	SOJ	TSOP2	SOJ	TSOP2	SOJ	TSOP2
Encapsulate equivalent code	TSOP40/44,.46,32	SOJ40,.44	TSOP40/44,.46,32	SOJ40,.44	TSOP40/44,.46,32	SOJ40,.44	TSOP40/44,.46,32
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	512	512	512	512	512	512	512
Maximum seat height	1.2 mm	3.6576 mm	1.2 mm	3.6576 mm	1.2 mm	3.6576 mm	1.2 mm
self refresh	NO	NO	NO	NO	NO	NO	NO
Maximum standby current	0.0001 A	0.0001 A	0.0001 A	0.0001 A	0.0001 A	0.0001 A	0.0001 A
Maximum slew rate	0.1 mA	0.1 mA	0.08 mA	0.08 mA	0.11 mA	0.09 mA	0.09 mA
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	J BEND	GULL WING	J BEND	GULL WING	J BEND	GULL WING
Terminal pitch	0.8 mm	1.27 mm	0.8 mm	1.27 mm	0.8 mm	1.27 mm	0.8 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	10.16 mm	10.16 mm	10.16 mm	10.16 mm	10.16 mm	10.16 mm	10.16 mm

Recommended Resources

Intrinsically protected safety op amp

Double button light switch circuit (12)

Xidao-Libohaier brand LDL-218 refrigerator circuit

High voltage PWM switching power supply circuit

gate circuit

Computer motherboard circuit diagram 440LX2_33

BlueNRG ADC2 reads back incorrect voltage value: I am using the development board (STEVAL-IDB009V1) to test the ADC Polling Demo program and found that when the ADC1 pin is selected for input, the voltage value read back is normal, 2.7V, but when th...; Roy_LDH ST - Low Power RF

Getting Started with Robot Operating System: [align=left][color=rgb(51, 51, 51)][size=17px][font=微软雅黑]In recent years, the field of robotics has continued to heat up, and a large number of robotic products have emerged, such as robot dogs, drone...; EE大学堂 Training Edition

ATA-1000 Series Broadband Amplifier Series Introduction: It turns out that its bandwidth can reach 25MHz! → Introduction of ATA-1000 series broadband amplifier series...; aigtekatdz Test/Measurement

Share: A summary of the most comprehensive answers to various questions in the 2019 e-sports competition: Saw this elsewhere, for reference only A summary of the most comprehensive answers to various questions in the 2019 e-sports competition The following is the most complete official answer currently co...; qwqwqw2088 Electronics Design Contest

Live broadcast at 10:30 am today | A brief discussion on Microchip's FPGA products and intelligent embedded vision solutions: As computing loads shift to edge devices, Microchip's FPGA products have 30-50% lower total power consumption than similar mid-density FPGAs, including 5-10 times lower static power consumption, makin...; EEWORLD社区 FPGA/CPLD

Analysis of the structure and working principle of single chip microcomputer serial communication: Serial communication is a method of data transmission. This method is simple to operate, has few connections, and has a long transmission distance. Therefore, it has been widely used in information tr...; 火辣西米秀 Microcontroller MCU

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components