DDR DRAM, 128MX4, 0.4ns, CMOS, PBGA60, ROHS COMPLIANT, FBGA-60
Parameter Name | Attribute value |
Is it Rohs certified? | conform to |
Maker | SAMSUNG |
Parts packaging code | BGA |
package instruction | TFBGA, BGA60,9X11,32 |
Contacts | 60 |
Reach Compliance Code | unknown |
ECCN code | EAR99 |
access mode | FOUR BANK PAGE BURST |
Maximum access time | 0.4 ns |
Other features | AUTO/SELF REFRESH |
Maximum clock frequency (fCLK) | 400 MHz |
I/O type | COMMON |
interleaved burst length | 4,8 |
JESD-30 code | R-PBGA-B60 |
length | 9.5 mm |
memory density | 536870912 bit |
Memory IC Type | DDR DRAM |
memory width | 4 |
Number of functions | 1 |
Number of ports | 1 |
Number of terminals | 60 |
word count | 134217728 words |
character code | 128000000 |
Operating mode | SYNCHRONOUS |
Maximum operating temperature | 95 °C |
Minimum operating temperature | |
organize | 128MX4 |
Output characteristics | 3-STATE |
Package body material | PLASTIC/EPOXY |
encapsulated code | TFBGA |
Encapsulate equivalent code | BGA60,9X11,32 |
Package shape | RECTANGULAR |
Package form | GRID ARRAY, THIN PROFILE, FINE PITCH |
Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
power supply | 1.8 V |
Certification status | Not Qualified |
refresh cycle | 8192 |
Maximum seat height | 1.2 mm |
self refresh | YES |
Continuous burst length | 4,8 |
Maximum standby current | 0.008 A |
Maximum slew rate | 0.21 mA |
Maximum supply voltage (Vsup) | 1.9 V |
Minimum supply voltage (Vsup) | 1.7 V |
Nominal supply voltage (Vsup) | 1.8 V |
surface mount | YES |
technology | CMOS |
Temperature level | OTHER |
Terminal form | BALL |
Terminal pitch | 0.8 mm |
Terminal location | BOTTOM |
Maximum time at peak reflow temperature | NOT SPECIFIED |
width | 7.5 mm |
Base Number Matches | 1 |