S70JL128H00BAI010 datasheet, PDF

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S70JL128H00BAI010: DescriptionFlash, 4MX16, 85ns, PBGA63, 12 X 11MM, 0.80 MM PITCH, LEAD FREE, BGA-63; Categorystorage storage; File Size151KB，8 Pages; ManufacturerCypress Semiconductor

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S70JL128H00BAI010 Overview

Flash, 4MX16, 85ns, PBGA63, 12 X 11MM, 0.80 MM PITCH, LEAD FREE, BGA-63

S70JL128H00BAI010 Parametric

Parameter Name	Attribute value
Maker	Cypress Semiconductor
package instruction	12 X 11MM, 0.80 MM PITCH, LEAD FREE, BGA-63
Reach Compliance Code	compliant
ECCN code	3A991.B.1.A
Maximum access time	85 ns
Spare memory width	8
startup block	BOTTOM/TOP
JESD-30 code	R-PBGA-B63
length	11.95 mm
memory density	67108864 bit
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of terminals	63
word count	4194304 words
character code	4000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	4MX16
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
Programming voltage	3.3 V
Certification status	Not Qualified
Maximum seat height	1.4 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
type	NOR TYPE
width	10.95 mm
Base Number Matches	1

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S70JL128H

Two Spansion

S29JL064H, 64 Megabit

(8 M x 8-Bit/4 M x 16-Bit)

CMOS 3.0 Volt-only, Simultaneous Read/Write

Flash Memories

PRELIMINARY

Distinctive Characteristics

Architectural Advantages

Simultaneous Read/Write operations

— Data can be continuously read from one bank while

executing erase/program functions in another bank.

— Zero latency between read and write operations

Flexible Bank architecture

— Read may occur in any of the three banks not being

written or erased.

— Four banks may be grouped by customer to achieve

desired bank divisions.

Boot Sectors

— Top and bottom boot sectors in the same device

— Any combination of sectors can be erased

Manufactured on 130 nm process technology

SecSi™ (Secured Silicon) Sector: Extra 256 Byte

sector

—

Factory locked and identifiable:

16 bytes available for

secure, random factory Electronic Serial Number;

verifiable as factory locked through autoselect

function.

—

Customer lockable:

One-time programmable only.

Once locked, data cannot be changed

Zero Power Operation

— Sophisticated power management circuits reduce

power consumed during inactive periods to nearly

zero.

Compatible with JEDEC standards

— Pinout and software compatible with single-power-

supply flash standard

— 10 mA active read current at 5 MHz

— 200 nA in standby or automatic sleep mode

Cycling Endurance: 1 million cycles per sector

typical

Data Retention: 20 years typical

Software Features

Supports Common Flash Memory Interface (CFI)

Erase Suspend/Erase Resume

— Suspends erase operations to read data from, or

program data to, a sector that is not being erased,

then resumes the erase operation.

Data# Polling and Toggle Bits

— Provides a software method of detecting the status of

program or erase cycles

Unlock Bypass Program command

— Reduces overall programming time when issuing

multiple program command sequences

Hardware Features

Ready/Busy# output (RY/BY#)

— Hardware method for detecting program or erase

cycle completion

Hardware reset pin (RESET#)

— Hardware method of resetting the internal state

machine to the read mode

WP#/ACC input pin

— Write protect (WP#) function protects sectors 0, 1,

140, and 141, regardless of sector protect status

— Acceleration (ACC) function accelerates program

timing

Sector protection

— Hardware method to prevent any program or erase

operation within a sector

— Temporary Sector Unprotect allows changing data in

protected sectors in-system

Performance Characteristics

High performance

— Access time as fast as 70 ns

— Program time: 4 µs/word typical using accelerated

programming function

Ultra low power consumption (typical values)

— 2 mA active read current at 1 MHz

Publication Number

S70JL128H

Revision

Amendment

Issue Date

January 26, 2004

This document contains information on a product under development at FASL LLC. The information is intended to help you evaluate this product. FASL LLC reserves the

right to change or discontinue work on this proposed product without notice.

S70JL128H00BAI010 Related Products

	S70JL128H00BAI010	S70JL128H00BAI000
Description	Flash, 4MX16, 85ns, PBGA63, 12 X 11MM, 0.80 MM PITCH, LEAD FREE, BGA-63	Flash, 4MX16, 70ns, PBGA63, 12 X 11MM, 0.80 MM PITCH, LEAD FREE, BGA-63
Maker	Cypress Semiconductor	Cypress Semiconductor
package instruction	12 X 11MM, 0.80 MM PITCH, LEAD FREE, BGA-63	12 X 11MM, 0.80 MM PITCH, LEAD FREE, BGA-63
Reach Compliance Code	compliant	compliant
ECCN code	3A991.B.1.A	3A991.B.1.A
Maximum access time	85 ns	70 ns
Spare memory width	8	8
startup block	BOTTOM/TOP	BOTTOM/TOP
JESD-30 code	R-PBGA-B63	R-PBGA-B63
length	11.95 mm	11.95 mm
memory density	67108864 bit	67108864 bit
Memory IC Type	FLASH	FLASH
memory width	16	16
Number of functions	1	1
Number of terminals	63	63
word count	4194304 words	4194304 words
character code	4000000	4000000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
organize	4MX16	4MX16
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFBGA	LFBGA
Package shape	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY	GRID ARRAY
Parallel/Serial	PARALLEL	PARALLEL
Programming voltage	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.4 mm	1.4 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V
Minimum supply voltage (Vsup)	2.7 V	2.7 V
Nominal supply voltage (Vsup)	3 V	3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	BALL	BALL
Terminal pitch	0.8 mm	0.8 mm
Terminal location	BOTTOM	BOTTOM
type	NOR TYPE	NOR TYPE
width	10.95 mm	10.95 mm

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