HYMP564U72P8-E3 datasheet, PDF

HYMP564U72P8-E3: DescriptionDDR DRAM Module, 64MX72, 0.6ns, CMOS, ROHS COMPLIANT, DIMM-240; Categorystorage storage; File Size436KB，24 Pages; ManufacturerSK Hynix; Websitehttp://www.hynix.com/eng/; Environmental Compliance

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HYMP564U72P8-E3 Overview

DDR DRAM Module, 64MX72, 0.6ns, CMOS, ROHS COMPLIANT, DIMM-240

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	SK Hynix
Parts packaging code	DIMM
package instruction	DIMM, DIMM240,40
Contacts	240
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	SINGLE BANK PAGE BURST
Maximum access time	0.6 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	200 MHz
I/O type	COMMON
JESD-30 code	R-XDMA-N240
JESD-609 code	e1
memory density	4831838208 bit
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	240
word count	67108864 words
character code	64000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	55 °C
Minimum operating temperature
organize	64MX72
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM240,40
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	260
power supply	1.8 V
Certification status	Not Qualified
refresh cycle	8192
self refresh	YES
Maximum standby current	0.045 A
Maximum slew rate	1.98 mA
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	NO LEAD
Terminal pitch	1 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	20
Base Number Matches	1

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