LXT322QE datasheet, PDF - EEWORLD Datasheet

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LXT322QE: DescriptionPCM Transceiver, 1-Func, T-1(DS1), CMOS, PQFP44, QFP-44; CategoryWireless rf/communication Telecom circuit; File Size958KB，45 Pages; ManufacturerInphi Corporation

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LXT322QE Overview

PCM Transceiver, 1-Func, T-1(DS1), CMOS, PQFP44, QFP-44

LXT322QE Parametric

Parameter Name	Attribute value
package instruction	QFP, QFP44,.52SQ,32
Reach Compliance Code	compliant
Carrier type	T-1(DS1)
data rate	1544 Mbps
JESD-30 code	S-PQFP-G44
length	10 mm
Number of functions	1
Number of terminals	44
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Encapsulate equivalent code	QFP44,.52SQ,32
Package shape	SQUARE
Package form	FLATPACK
power supply	5 V
Certification status	Not Qualified
Maximum seat height	2.45 mm
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	PCM TRANSCEIVER
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
width	10 mm
Base Number Matches	1

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Cortina Systems

LXT332 Dual T1/E1

Line Interface Unit with Crystal-less

Jitter Attenuation

Datasheet

The Cortina Systems

LXT332 Dual T1/E1 Line Interface Unit with Crystal-less Jitter

Attenuation (LXT332) is a fully integrated Dual Line Interface Unit (DLIU) for both

1.544 Mbps (T1) and 2.048 Mbps (E1) applications. It features B8ZS/HDB3 encoders and

decoders, and a constant low output impedance transmitter for high return loss. Transmit

pulse shape is selectable for various line lengths and cable types.

The LXT332 incorporates an advanced crystal-less digital jitter attenuator, switchable to

either the transmit or receive side. This eliminates the need for an external quartz crystal.

It offers both a serial interface (SIO) for microprocessor control and a hardware control

mode for stand-alone operation.

The LXT332 offers a variety of advanced diagnostic and performance monitoring features.

It uses an advanced double-poly, double-metal CMOS process and requires only a single

5-volt power supply.

Applications

PCM/Voice Channel Banks

Data Channel Bank/Concentrator

T1/E1 multiplexer

Digital Access and Cross-connect

Systems (DACS)

Computer to PBX interface (CPI & DMI)

SONET/SDH Multiplexers

Interfacing Customer Premises

Equipment to a CSU

Digital Loop Carrier (DLC) terminals

Product Features

Digital (crystal-less) jitter attenuation,

selectable for receive or transmit path,

or may be disabled

High transmit and receive return loss

Constant low output impedance

transmitter with programmable

equalizer shapes pulses to meet DSX-1

pulse template from 0 to 655 ft.

Meets or exceeds industry

specifications including ITU G.703,

ANSI T1.403, AT&T Pub 62411 and

ITU-T G.742

Compatible with most industry standard

framers

Complete line driver, data recovery and

clock recovery functions

Minimum receive signal of 500 mV, with

selectable slicer levels to improve SNR

Local, remote, and dual loopback

functions

Built-In Self Test with QRSS Pattern

Generator

Transmit/Receive performance

monitors with Driver Fail Monitor (DFM)

and Loss of Signal (LOS) outputs

Receiver jitter tolerance 0.4 UI from

40 kHz to 100 kHz

Available in 44-pin PLCC and 44-pin

QFP packages

LXT332

Datasheet

249075, Revision 2.0

26 June 2007

Contents

1.0

2.0

Block Diagram ............................................................................................................................... 6

Overview......................................................................................................................................... 7

2.1

Standard LXT332 Features .................................................................................................. 7

2.1.1 Tri-state Outputs ...................................................................................................... 7

2.1.2 Bipolar or Unipolar Data I/O..................................................................................... 7

2.1.3 B8ZS or HDB3 Zero Suppression............................................................................ 7

2.1.4 Selectable Jitter Attenuation .................................................................................... 7

2.1.5 Dual Loopback ......................................................................................................... 7

Additional Host-Mode Features ............................................................................................ 7

2.2.1 High Frequency Clocks............................................................................................ 7

2.2.2 Bipolar Violation Insertion ........................................................................................ 7

2.2.3 Built-In Self Test (QRSS) ......................................................................................... 8

2.2.4 AIS Detection ........................................................................................................... 8

2.2

3.0

4.0

Pin Assignments and Signal Descriptions.................................................................................. 9

Functional Description................................................................................................................ 17

4.1

4.2

4.3

4.4

4.5

4.6

4.7

Receiver.............................................................................................................................. 17

Transmitter.......................................................................................................................... 18

4.2.1 Bipolar Violation Insertions .................................................................................... 18

4.2.2 Pulse Shape .......................................................................................................... 19

Driver Failure Monitor ......................................................................................................... 19

Jitter Attenuation ................................................................................................................. 20

Built-In Self Test ................................................................................................................. 20

Operating Modes ................................................................................................................ 20

Host Mode Control .............................................................................................................. 20

4.7.1 Serial Input Word ................................................................................................... 21

4.7.2 Serial Output Word ................................................................................................ 21

4.7.3 Interrupt Handling .................................................................................................. 25

Hardware Mode Control...................................................................................................... 25

Diagnostic Mode Operation ................................................................................................ 25

4.9.1 Transmit All Ones (See

Figure 8)

.......................................................................... 25

4.9.2 Local Loopback (See

Figure 9

and

Figure 10)

...................................................... 26

4.9.3 Remote Loopback (See

Figure 11)

........................................................................ 27

4.9.4 Dual Loopback (See

Figure 12)

............................................................................. 28

4.9.5 QRSS Built-In Self Test - Host Mode..................................................................... 29

Initialization/Reset Operation ..............................................................................................29

Power Requirements ..........................................................................................................31

Transformers ...................................................................................................................... 31

Line Protection .................................................................................................................... 31

1.544 Mbps T1 Applications ............................................................................................... 31

2.048 Mbps E1/CEPT Interface Applications...................................................................... 34

5.5.1 E1 Coaxial Applications ......................................................................................... 34

5.5.2 E1 Twisted-Pair Applications ................................................................................. 34

4.8

4.9

4.10

5.0

5.1

5.2

5.3

5.4

5.5

Application Information .............................................................................................................. 31

6.0

Test Specifications ...................................................................................................................... 36

Cortina Systems

LXT332 Dual T1/E1 Line Interface Unit with Crystal-less Jitter Attenuation

Page 3

LXT332

Datasheet

249075, Revision 2.0

26 June 2007

Figures

7.0

Mechanical Specifications .......................................................................................................... 43

Figures

Block Diagram ................................................................................................................................. 6

Pin Assignments (Frame Graphic) and Package Markings (PLCC) ................................................ 9

Pin Assignments (Frame Graphic) and Package Markings (QFP Package) ................................. 10

50% AMI Coding............................................................................................................................ 18

SIO Write Operation ...................................................................................................................... 23

SIO Read Operation ...................................................................................................................... 23

Interrupt Handling .......................................................................................................................... 24

TAOS Data Path............................................................................................................................ 26

TAOS with LLOOP & Selectable JA ..............................................................................................26

Local Loopback - Selectable JA .................................................................................................... 27

Remote Loopback - Selectable JA ................................................................................................ 28

Dual Loopback............................................................................................................................... 28

QRSS BIST ................................................................................................................................... 29

Typical T1 Application (Host Control Mode, Bipolar I/O) ............................................................... 33

Line Interface for E1 Coax Applications ........................................................................................ 34

Typical E1 120 W Application (Hardware Control Mode) .............................................................. 35

Serial Data Input Timing Diagram ................................................................................................. 39

Serial Data Output Timing Diagram............................................................................................... 39

Receive Clock Timing .................................................................................................................... 39

Transmit Clock Timing ................................................................................................................... 40

Typical Receiver Input Jitter Tolerance (Loop Mode) .................................................................... 41

Typical Jitter Transfer Performance ..............................................................................................42

PLCC Package Specifications ....................................................................................................... 43

QFP Package Specifications ......................................................................................................... 44

Tables

Host Mode and Bipolar Host Mode Pin Descriptions..................................................................... 11

Unipolar Host Mode Pin Descriptions

1 ..........................................................................................................................13

Hardware Mode and Bipolar Hardware Mode Pin Descriptions

1 .....................................................................14

Unipolar Hardware Mode Pin Descriptions

1 ...............................................................................................................16

Equalizer Control Inputs ................................................................................................................ 19

CLKE Settings ............................................................................................................................... 21

SIO Input Bit Settings (See

Figure 5)

............................................................................................ 22

Serial Data Output Bit Coding (See

Figure 6)

............................................................................... 22

Recommended Transformer Values..............................................................................................32

Transformer Combinations ............................................................................................................ 32

Absolute Maximum Ratings ...........................................................................................................36

Recommended Operating Conditions ........................................................................................... 36

Electrical Characteristics (Over Recommended Operating Conditions) ........................................ 36

Analog Specifications (Over Recommended Operating Conditions) ............................................. 37

Serial I/O Timing Characteristics (See

Figure 17

and

Figure 18)

.................................................. 38

Receive Timing Characteristics (See

Figure 19)

........................................................................... 40

Master Clock and Transmit Timing Characteristics (See

Figure 20)

............................................. 40

Cortina Systems

LXT332 Dual T1/E1 Line Interface Unit with Crystal-less Jitter Attenuation

Page 4

LXT322QE Related Products

	LXT322QE	LXT322PE
Description	PCM Transceiver, 1-Func, T-1(DS1), CMOS, PQFP44, QFP-44	PCM Transceiver, 1-Func, T-1(DS1), CMOS, PQCC44, PLASTIC, LCC-44
package instruction	QFP, QFP44,.52SQ,32	QCCJ, LDCC44,.7SQ
Reach Compliance Code	compliant	compliant
Carrier type	T-1(DS1)	T-1(DS1)
data rate	1544 Mbps	1544 Mbps
JESD-30 code	S-PQFP-G44	S-PQCC-J44
length	10 mm	16.5862 mm
Number of functions	1	1
Number of terminals	44	44
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QFP	QCCJ
Encapsulate equivalent code	QFP44,.52SQ,32	LDCC44,.7SQ
Package shape	SQUARE	SQUARE
Package form	FLATPACK	CHIP CARRIER
power supply	5 V	5 V
Certification status	Not Qualified	Not Qualified
Maximum seat height	2.45 mm	4.572 mm
Nominal supply voltage	5 V	5 V
surface mount	YES	YES
technology	CMOS	CMOS
Telecom integrated circuit types	PCM TRANSCEIVER	PCM TRANSCEIVER
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	J BEND
Terminal pitch	0.8 mm	1.27 mm
Terminal location	QUAD	QUAD
width	10 mm	16.5862 mm
Base Number Matches	1	1

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