Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MPC5604BC
Rev. 12, 04/2014
MPC5604B/C
MAPBGA–225
208 MAPBGA
15 mm
15 mm x
(17 x 17 x 1.7 mm)
QFN12
144 LQFP
##_mm_x_##mm
(20 x 20 x 1.4 mm)
MPC5604B/C
Microcontroller Data Sheet
Features
•
Single issue, 32-bit CPU core complex (e200z0)
— Compliant with the Power Architecture
®
embedded category
— Includes an instruction set enhancement
allowing variable length encoding (VLE) for
code size footprint reduction. With the optional
encoding of mixed 16-bit and 32-bit
instructions, it is possible to achieve significant
code size footprint reduction.
Up to 512 KB on-chip code flash supported with the
flash controller and ECC
64 (4 × 16) KB on-chip data flash memory with ECC
Up to 48 KB on-chip SRAM with ECC
Memory protection unit (MPU) with 8 region
descriptors and 32-byte region granularity
Interrupt controller (INTC) with 148 interrupt
vectors, including 16 external interrupt sources and
18 external interrupt/wakeup sources
Frequency modulated phase-locked loop (FMPLL)
Crossbar switch architecture for concurrent access to
peripherals, flash memory, or RAM from multiple
bus masters
Boot assist module (BAM) supports internal flash
programming via a serial link (CAN or SCI)
Timer supports input/output channels providing a
range of 16-bit input capture, output compare, and
pulse width modulation functions (eMIOS-lite)
10-bit analog-to-digital converter (ADC)
3 serial peripheral interface (DSPI) modules
Up to 4 serial communication interface (LINFlex)
modules
•
•
•
100 LQFP
(14 x 14 x 1.4 mm)
SOT-343R
##_mm_x_##mm
TBD
PKG-TBD
## mm x ## mm
64 LQFP
(10 x 10 x 1.4 mm)
•
•
•
•
•
•
•
•
•
•
•
•
•
Up to 6 enhanced full CAN (FlexCAN) modules
with configurable buffers
1 inter IC communication interface (I
2
C) module
Up to 123 configurable general purpose pins
supporting input and output operations (package
dependent)
Real Time Counter (RTC) with clock source from
128 kHz or 16 MHz internal RC oscillator
supporting autonomous wakeup with 1 ms
resolution with max timeout of 2 seconds
Up to 6 periodic interrupt timers (PIT) with 32-bit
counter resolution
1 System Module Timer (STM)
Nexus development interface (NDI) per IEEE-ISTO
5001-2003 Class Two Plus standard
Device/board boundary Scan testing supported with
per Joint Test Action Group (JTAG) of IEEE (IEEE
1149.1)
On-chip voltage regulator (VREG) for regulation of
input supply for all internal levels
•
•
•
•
•
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2009-2014. All rights reserved.
Table of Contents
1
2
3
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.1 Document overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Package pinouts and signal descriptions . . . . . . . . . . . . . . . .11
3.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.2 Pad configuration during reset phases . . . . . . . . . . . . .15
3.3 Voltage supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.4 Pad types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.5 System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
3.6 Functional ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
3.7 Nexus 2+ pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
4.2 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . .35
4.3 NVUSRO register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
4.3.1 NVUSRO[PAD3V5V] field description . . . . . . . .35
4.3.2 NVUSRO[OSCILLATOR_MARGIN] field description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
4.3.3 NVUSRO[WATCHDOG_EN] field description . .36
4.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . .37
4.5 Recommended operating conditions . . . . . . . . . . . . . .38
4.6 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . .40
4.6.1 Package thermal characteristics . . . . . . . . . . . .40
4.6.2 Power considerations. . . . . . . . . . . . . . . . . . . . .41
4.7 I/O pad electrical characteristics . . . . . . . . . . . . . . . . . .41
4.7.1 I/O pad types . . . . . . . . . . . . . . . . . . . . . . . . . . .41
4.7.2 I/O input DC characteristics . . . . . . . . . . . . . . . .42
4.7.3 I/O output DC characteristics. . . . . . . . . . . . . . .43
4.7.4 Output pin transition times . . . . . . . . . . . . . . . . .45
4.7.5 I/O pad current specification . . . . . . . . . . . . . . .46
4.8 RESET electrical characteristics. . . . . . . . . . . . . . . . . .51
4.9 Power management electrical characteristics. . . . . . . .53
4.9.1 Voltage regulator electrical characteristics . . . .53
4.9.2 Low voltage detector electrical characteristics .57
4.10 Power consumption. . . . . . . . . . . . . . . . . . . . . . . . . . . .59
4.11 Flash memory electrical characteristics . . . . . . . . . . . 61
4.11.1 Program/Erase characteristics . . . . . . . . . . . . . 61
4.11.2 Flash power supply DC characteristics . . . . . . 62
4.11.3 Start-up/Switch-off timings . . . . . . . . . . . . . . . . 63
4.12 Electromagnetic compatibility (EMC) characteristics. . 63
4.12.1 Designing hardened software to avoid noise
problems. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.12.2 Electromagnetic interference (EMI) . . . . . . . . . 63
4.12.3 Absolute maximum ratings (electrical sensitivity)64
4.13 Fast external crystal oscillator (4 to 16 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.14 Slow external crystal oscillator (32 kHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
4.15 FMPLL electrical characteristics . . . . . . . . . . . . . . . . . 69
4.16 Fast internal RC oscillator (16 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.17 Slow internal RC oscillator (128 kHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.18 ADC electrical characteristics . . . . . . . . . . . . . . . . . . . 73
4.18.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4.18.2 Input impedance and ADC accuracy . . . . . . . . 73
4.18.3 ADC electrical characteristics . . . . . . . . . . . . . 78
4.19 On-chip peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.19.1 Current consumption . . . . . . . . . . . . . . . . . . . . 80
4.19.2 DSPI characteristics. . . . . . . . . . . . . . . . . . . . . 82
4.19.3 Nexus characteristics . . . . . . . . . . . . . . . . . . . . 88
4.19.4 JTAG characteristics. . . . . . . . . . . . . . . . . . . . . 89
5 Package characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
5.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . 90
5.1.1 64 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
5.1.2 100 LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
5.1.3 144 LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
5.1.4 208 MAPBGA. . . . . . . . . . . . . . . . . . . . . . . . . . 99
6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
7 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Appendix AAbbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
4
MPC5604B/C Microcontroller Data Sheet, Rev. 12
2
Freescale Semiconductor
Introduction
1
1.1
Introduction
Document overview
This document describes the features of the family and options available within the family members, and highlights important
electrical and physical characteristics of the device. To ensure a complete understanding of the device functionality, refer also
to the device reference manual and errata sheet.
1.2
Description
The MPC5604B/C is a family of next generation microcontrollers built on the Power Architecture
®
embedded category.
The MPC5604B/C family of 32-bit microcontrollers is the latest achievement in integrated automotive application controllers.
It belongs to an expanding family of automotive-focused products designed to address the next wave of body electronics
applications within the vehicle. The advanced and cost-efficient host processor core of this automotive controller family
complies with the Power Architecture embedded category and only implements the VLE (variable-length encoding) APU,
providing improved code density. It operates at speeds of up to 64 MHz and offers high performance processing optimized for
low power consumption. It capitalizes on the available development infrastructure of current Power Architecture devices and
is supported with software drivers, operating systems and configuration code to assist with users implementations.
MPC5604B/C Microcontroller Data Sheet, Rev. 12
Freescale Semiconductor
3
Table 1. MPC5604B/C device comparison
1
Introduction
Device
Feature
MPC56 MPC56 MPC56 MPC56 MPC56 MPC56 MPC56 MPC56 MPC56 MPC56 MPC56 MPC56 MPC56 MPC56 MPC56 MPC5604
02BxLH 02BxLL 02BxLQ 02CxLH 02CxLL 03BxLH 03BxLL 03BxLQ 03CxLH 03CxLL 04BxLH 04BxLL 04BxLQ 04CxLH 04CxLL BxMG
e200z0h
Static – up to 64 MHz
256 KB
384 KB
64 KB (4 × 16 KB)
24 KB
32 KB
28 KB
8-entry
12 ch
28 ch
36 ch
8 ch
28 ch
12 ch
28 ch
36 ch
8 ch
Yes
12 ch,
16-bit
2 ch
10 ch
—
28 ch,
16-bit
5 ch
20 ch
3 ch
3
5
2
2
6
3
2
5
3
6
2
3
7
1
Yes
45
79
123
45
79
45
79
123
JTAG
64
LQFP
100
LQFP
144
LQFP
64
LQFP
100
LQFP
64
LQFP
100
LQFP
144
LQFP
64
LQFP
100
LQFP
64
LQFP
100
LQFP
144
LQFP
64
LQFP
45
79
45
79
123
45
79
123
Nexus2+
100
208
LQFP MAPBGA
9
3
2
5
56 ch,
16-bit
10 ch
40 ch
6 ch
12 ch,
16-bit
2 ch
10 ch
—
28 ch,
16-bit
5 ch
20 ch
3 ch
12 ch,
16-bit
2 ch
10 ch
—
28 ch,
16-bit
5 ch
20 ch
3 ch
56 ch,
16-bit
10 ch
40 ch
6 ch
12 ch,
16-bit
2 ch
10 ch
—
28 ch,
16-bit
5 ch
20 ch
3 ch
4
3
6
2
3
7
3
2
5
3
6
12 ch,
16-bit
2 ch
10 ch
—
28 ch,
16-bit
5 ch
20 ch
3 ch
56 ch,
16-bit
10 ch
40 ch
6 ch
12 ch,
16-bit
2 ch
10 ch
—
28 ch,
16-bit
5 ch
20 ch
3 ch
56 ch,
16-bit
10 ch
40 ch
6 ch
28 ch
12 ch
28 ch
36 ch
8 ch
28 ch
36 ch
40 KB
32 KB
48 KB
512 KB
4
CPU
Execution
speed
2
Code Flash
Data Flash
MPC5604B/C Microcontroller Data Sheet, Rev. 12
Freescale Semiconductor
RAM
MPU
ADC (10-bit)
CTU
Total timer
I/O
3
eMIOS
• PWM + MC
+ IC/OC
4
• PWM +
IC/OC
4
• IC/OC
4
SCI (LINFlex)
SPI (DSPI)
CAN
(FlexCAN)
I
2
C
32 kHz
oscillator
GPIO
8
Debug
Package
Freescale Semiconductor
MPC5604B/C Microcontroller Data Sheet, Rev. 12
5
1
2
3
4
5
6
7
8
9
Feature set dependent on selected peripheral multiplexing—table shows example implementation
Based on 125 °C ambient operating temperature
See the eMIOS section of the device reference manual for information on the channel configuration and functions.
IC – Input Capture; OC – Output Compare; PWM – Pulse Width Modulation; MC – Modulus counter
SCI0, SCI1 and SCI2 are available. SCI3 is not available.
CAN0, CAN1 are available. CAN2, CAN3, CAN4 and CAN5 are not available.
CAN0, CAN1 and CAN2 are available. CAN3, CAN4 and CAN5 are not available.
I/O count based on multiplexing with peripherals
208 MAPBGA available only as development package for Nexus2+
Introduction
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