Datasheet
M16C/65 Group
RENESAS MCU
R01DS0031EJ0210
Rev.2.10
Jul 31, 2012
1.
1.1
Overview
Features
The M16C/65 Group microcomputer (MCU) incorporates the M16C/60 Series CPU core and flash
memory, employing sophisticated instructions for a high level of efficiency. This MCU has 1 MB of address
space (expandable to 4 MB), and it is capable of executing instructions at high speed. In addition, the
CPU core boasts a multiplier for high-speed operation processing.
This MCU consumes low power, and supports operating modes that allow additional power control. The
MCU also uses an anti-noise configuration to reduce emissions of electromagnetic noise and is designed
to withstand electromagnetic interference (EMI). By integrating many of the peripheral functions, including
the multifunction timer and serial interface, the number of system components has been reduced.
1.1.1
Applications
This MCU can be used in audio components, cameras, televisions, household appliances, office
equipment, communication devices, mobile devices, industrial equipment, and other applications.
R01DS0031EJ0210 Rev.2.10
Jul 31, 2012
Page 1 of 111
M16C/65 Group
1. Overview
1.2
Specifications
The M16C/65 Group includes 128-pin and 100-pin packages. Table 1.1 to Table 1.4 list specifications.
Table 1.1
Item
Specifications for the 128-Pin Package (1/2)
Function
Description
M16C/60 Series core
(multiplier: 16 bit × 16 bit 32 bit,
multiply and accumulate instruction: 16 bit × 16 bit + 32 bit 32 bit)
•
Number of basic instructions: 91
•
Minimum instruction execution time:
31.25 ns (f(BCLK) = 32 MHz, VCC1 = VCC2 = 2.7 to 5.5 V)
•
Operating modes: Single-chip, memory expansion, and microprocessor
See Table 1.5 “Product List (1/2)” and Table 1.6 “Product List (2/2)”.
CPU
Central processing unit
Memory
Voltage
Detection
ROM, RAM, data flash
Voltage detector
•
Power-on reset
•
3 voltage detection points (detection level of voltage detection 0 and 1
selectable)
•
5 circuits: Main clock, sub clock, low-speed on-chip oscillator (125 kHz),
high-speed on-chip oscillator (40 MHz ±10%), PLL frequency synthesizer
•
Oscillation stop detection: Main clock oscillation stop/restart detection
function
•
Frequency divider circuit: Divide ratio selectable from 1, 2, 4, 8, and 16
•
Power saving features: Wait mode, stop mode
•
Real-time clock
Clock
Clock generator
•
Address space: 1 MB
•
External bus interface: 0 to 8 waits inserted, 4 chip select outputs,
External Bus
Bus memory expansion
Expansion
memory area expansion function (expandable to 4 MB), 3 V and 5 V
interfaces
•
Bus format: Separate bus or multiplexed bus selectable, data bus width
selectable (8 or 16 bits), number of address buses selectable (12, 16, or
20)
I/O Ports
Programmable I/O ports
Interrupts
•
CMOS I/O ports: 111 (selectable pull-up resistors)
•
N-channel open drain ports: 3
•
Interrupt vectors: 70
•
External interrupt inputs: 13 (NMI,
INT
× 8, key input × 4)
•
Interrupt priority levels: 7
15-bit timer × 1 (with prescaler)
Automatic reset start function selectable
Watchdog Timer
DMA
DMAC
•
4 channels, cycle steal mode
•
Trigger sources: 43
•
Transfer modes: 2 (single transfer, repeat transfer)
R01DS0031EJ0210 Rev.2.10
Jul 31, 2012
Page 2 of 111
M16C/65 Group
1. Overview
Table 1.2
Item
Specifications for the 128-Pin Package (2/2)
Function
Description
16-bit timer × 5
Timer mode, event counter mode, one-shot timer mode, pulse width
modulation (PWM) mode
Event counter two-phase pulse signal processing (two-phase encoder
input) × 3
Programmable output mode × 3
16-bit timer × 6
Timer mode, event counter mode, pulse period measurement mode,
pulse width measurement mode
Timer A
Timer B
Timers
Three-phase motor control
timer functions
Real-time clock
PWM function
•
Three-phase inverter control (timer A1, timer A2, timer A4, timer B2)
•
On-chip dead time timer
Count: seconds, minutes, hours, days of the week
8 bits × 2
•
2 circuits
•
4 wave pattern matchings (differentiate wave pattern for headers, data
Remote control signal receiver
0, data 1, and special data)
•
6-byte receive buffer (1 circuit only)
•
Operating frequency of 32 kHz
Clock synchronous/asynchronous × 6 channels
I
2
C-bus, IEBus, special mode 2
SIM (UART2)
Clock synchronization only × 2 channels
1 channel
CEC transmit/receive, arbitration lost detection, ACK automatic output,
operation frequency of 32 kHz
10-bit resolution × 26 channels, including sample and hold function
Conversion time: 1.72 µs
8-bit resolution × 2 circuits
CRC-CCITT (X
16
+ X
12
+ X
5
+ 1),
CRC-16 (X
16
+ X
15
+ X
2
+ 1) compliant
Serial
Interface
UART0 to UART2, UART5 to
UART7
SI/O3, SI/O4
Multi-master I
2
C-bus Interface
CEC Functions
(2)
A/D Converter
D/A Converter
CRC Calculator
Flash Memory
•
Program and erase power supply voltage: 2.7 to 5.5 V
•
Program and erase cycles: 1,000 times (program ROM 1, program
ROM 2), 10,000 times (data flash)
•
Program security: ROM code protect, ID code check
On-chip debug, on-board flash rewrite, address match interrupt × 4
32 MHz/VCC1 = 2.7 to 5.5 V, VCC2 = 2.7 V to VCC1
Described in Electrical Characteristics
-20°C to 85°C, -40°C to 85°C
(1)
128-pin LQFP: PLQP0128KB-A (Previous package code: 128P6Q-A)
Debug Functions
Operation Frequency/Supply Voltage
Current Consumption
Operating Temperature
Package
Notes:
1. See Table 1.5 “Product List (1/2)” and Table 1.6 “Product List (2/2)” for the operating temperature.
2. The CEC function indicates circuitry which supports the transmission and reception of CEC signals standardized
by the High-Definition Multimedia Interface (HDMI). HDMI and High-Definition Multimedia Interface are
registered trademarks of HDMI Licensing, LLC.
R01DS0031EJ0210 Rev.2.10
Jul 31, 2012
Page 3 of 111
M16C/65 Group
1. Overview
Table 1.3
Item
Specifications for the 100-Pin Package (1/2)
Function
Description
M16C/60 Series core
(multiplier: 16 bit × 16 bit 32 bit,
multiply and accumulate instruction: 16 bit × 16 bit + 32 bit 32 bit)
•
Number of basic instructions: 91
•
Minimum instruction execution time:
31.25 ns (f(BCLK) = 32 MHz, VCC1 = VCC2 = 2.7 to 5.5 V)
•
Operating modes: Single-chip, memory expansion, and microprocessor
See Table 1.5 “Product List (1/2)” and Table 1.6 “Product List (2/2)”.
CPU
Central processing unit
Memory
Voltage
Detection
ROM, RAM, data flash
Voltage detector
•
Power-on reset
•
3 voltage detection points (detection level of voltage detection 0 and 1
selectable)
•
5 circuits: Main clock, sub clock, low-speed on-chip oscillator (125 kHz),
high-speed on-chip oscillator (40 MHz ±10%), PLL frequency synthesizer
•
Oscillation stop detection: Main clock oscillation stop/restart detection
function
•
Frequency divider circuit: Divide ratio selectable from 1, 2, 4, 8, and 16
•
Power saving features: Wait mode, stop mode
•
Real-time clock
Clock
Clock generator
•
Address space: 1 MB
•
External bus interface: 0 to 8 waits inserted, 4 chip select outputs,
External Bus
Bus memory expansion
Expansion
memory area expansion function (expandable to 4 MB), 3 V and 5 V
interfaces
•
Bus format: Separate bus or multiplexed bus selectable, data bus width
selectable (8 or 16 bits), number of address buses selectable (12, 16, or
20)
I/O Ports
Programmable I/O ports
Interrupts
•
CMOS I/O ports: 85 (selectable pull-up resistors)
•
N-channel open drain ports: 3
•
Interrupt vectors: 70
•
External interrupt inputs: 13 (NMI,
INT
× 8, key input × 4)
•
Interrupt priority levels: 7
15-bit timer × 1 (with prescaler)
Automatic reset start function selectable
Watchdog Timer
DMA
DMAC
•
4 channels, cycle steal mode
•
Trigger sources: 43
•
Transfer modes: 2 (single transfer, repeat transfer)
R01DS0031EJ0210 Rev.2.10
Jul 31, 2012
Page 4 of 111
M16C/65 Group
1. Overview
Table 1.4
Item
Specifications for the 100-Pin Package (2/2)
Function
Description
16-bit timer × 5
Timer mode, event counter mode, one-shot timer mode, pulse width
modulation (PWM) mode
Event counter two-phase pulse signal processing (two-phase encoder
input) × 3
Programmable output mode × 3
16-bit timer × 6
Timer mode, event counter mode, pulse period measurement mode,
pulse width measurement mode
Timer A
Timer B
Timers
Three-phase motor control
timer functions
Real-time clock
PWM function
•
Three-phase inverter control (timer A1, timer A2, timer A4, timer B2)
•
On-chip dead time timer
Count: seconds, minutes, hours, days of the week
8 bits × 2
•
2 circuits
•
4 wave pattern matchings (differentiate wave pattern for headers, data
Remote control signal receiver
0, data 1, and special data)
•
6-byte receive buffer (1 circuit only)
•
Operating frequency of 32 kHz
Clock synchronous/asynchronous × 6 channels
I
2
C-bus, IEBus, special mode 2
SIM (UART2)
Clock synchronization only × 2 channels
1 channel
CEC transmit/receive, arbitration lost detection, ACK automatic output,
operation frequency of 32 kHz
10-bit resolution × 26 channels, including sample and hold function
Conversion time: 1.72 µs
8-bit resolution × 2 circuits
CRC-CCITT (X
16
+ X
12
+ X
5
+ 1),
CRC-16 (X
16
+ X
15
+ X
2
+ 1) compliant
Serial
Interface
UART0 to UART2, UART5 to
UART7
SI/O3, SI/O4
Multi-master I
2
C-bus Interface
CEC Functions
(2)
A/D Converter
D/A Converter
CRC Calculator
Flash Memory
•
Program and erase power supply voltage: 2.7 to 5.5 V
•
Program and erase cycles: 1,000 times (program ROM 1, program
ROM 2), 10,000 times (data flash)
•
Program security: ROM code protect, ID code check
On-chip debug, on-board flash rewrite, address match interrupt × 4
25 MHz/VCC1 = 2.7 to 5.5 V, VCC2 = 2.7 V to VCC1
32 MHz/VCC1 = 2.7 to 5.5 V, VCC2 = 2.7 V to VCC1
Described in Electrical Characteristics
-20°C to 85°C, -40°C to 85°C
(1)
100-pin QFP: PRQP0100JD-B (Previous package code: 100P6F-A)
100-pin LQFP: PLQP0100KB-A (Previous package code: 100P6Q-A)
Debug Functions
Operation Frequency/Supply Voltage
Current Consumption
Operating Temperature
Package
Notes:
1. See Table 1.5 “Product List (1/2)” and Table 1.6 “Product List (2/2)” for the operating temperature.
2. The CEC function indicates circuitry which supports the transmission and reception of CEC signals standardized
by the High-Definition Multimedia Interface (HDMI). HDMI and High-Definition Multimedia Interface are
registered trademarks of HDMI Licensing, LLC.
R01DS0031EJ0210 Rev.2.10
Jul 31, 2012
Page 5 of 111
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