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ART2815T/CKA

Description
DC-DC Regulated Power Supply Module, Hybrid
CategoryPower/power management    The power supply circuit   
File Size224KB,12 Pages
ManufacturerInternational Rectifier ( Infineon )
Websitehttp://www.irf.com/
Download Datasheet Parametric View All

ART2815T/CKA Overview

DC-DC Regulated Power Supply Module, Hybrid

ART2815T/CKA Parametric

Parameter NameAttribute value
package instruction, MODULE,12LEAD,3.0
Reach Compliance Codeunknown
ECCN codeEAR99
Analog Integrated Circuits - Other TypesDC-DC REGULATED POWER SUPPLY MODULE
Maximum input voltage50 V
Minimum input voltage19 V
Number of terminals12
Maximum operating temperature85 °C
Minimum operating temperature-55 °C
Maximum output current3 A
Nominal output voltage15 V
Package body materialMETAL
Encapsulate equivalent codeMODULE,12LEAD,3.0
Package formMICROELECTRONIC ASSEMBLY
Certification statusNot Qualified
technologyHYBRID
Temperature levelOTHER
Base Number Matches1

ART2815T/CKA Preview

PD-94529G
ART28XXT SERIES
HYBRID - HIGH RELIABILITY
RADIATION HARDENED
DC-DC CONVERTER
Description
The ART Series of three output DC-DC converters are
designed specifically for use in the hostile radiation
environments characteristic of space and weapon
systems. The extremely high level of radiation tolerance
inherent in the ART design is the culmination of
extensive research, thorough analysis and testing and
of careful component selection. Many of the proven
circuit design features characterizing the International
Rectifier standard product line were adapted for
incorporation into the ART topology. Capable of
uniformly high performance over long term exposures
in radiation intense environments, this series sets the
standard for distributed power systems demanding high
performance and reliability.
The ART converters are hermetically sealed in a
rugged, low profile package utilizing copper core pins
to minimize resistive DC losses. Long-term hermeticity
is assured through use of parallel seam welded lid
attachment along with International Rectifier’s rugged
ceramic pin-to-package seal. Axial orientation of the
leads facilitates preferred bulkhead mounting to the
principal heat-dissipating surface.
Manufactured in a facility fully qualified to MIL-PRF-38534,
these converters are fabricated utilizing DLA qualified
processes. For available screening options, refer to
device screening table in the data sheet.
Variations in electrical, mechanical and screening
specifications can be accommodated. Contact IR San
Jose for special requirements.
28V Input, Triple Output
ART
Features
n
n
n
n
n
n
n
n
n
n
n
n
n
n
n
Total Dose > 100 krad (Si), 2:1margin
SEE Hardened to LET up to 83 Mev
.
cm
2
/mg
Output Power Range 3 to 30 Watts
19 to 50 Volt Input Range
Input Undervoltage Lockout
High Electrical Efficiency > 83%
Full Performance from -55°C to +125°C
Continuous Short Circuit and Overload
Protection
12.8 W/in
3
Output Power Density
True Hermetic Package
External Inhibit Port
Externally Synchronizable
Fault Tolerant Design
5V,
±
12V or
±
15 V Outputs Available
Standard Microcircuit Drawings Available
www.irf.com
1
08/15/12
ART28XXT SERIES
SPECIFICATIONS
Absolute Maximum/Minimum Ratings
Note 1
Input voltage range
Minimum Output Current
Soldering temperature
Storage temperature
-0.5V to +80V
5% maximum rated
current, any output
300°C for 10 seconds
-65°C to +135°C
Output Power range
Operating temperature
Recommended Operating Conditions
Note 2
Input Voltage range
+19V to +60V
+19V to +50V for full
derating to MIL-STD-975
3.0W to 30W
-55°C to +125°C
-55°C to +85°C for full
derating to MIL-STD-975
Electrical Performance
-55°C < T
CASE
< +125°C, V
IN
=28V, C
L
=0
unless otherwise specified.
Parameter
Output voltage accuracy
Symbol
V
OUT
Conditions
I
OUT
= 1.5Adc, T
C
= +25°C
(main)
Min
4.95
±11.50
±14.50
3.0
(main)
(dual)
(main)
(dual)
(main)
(dual)
(main)
150
75
-15
-60
-180
-300
-10
-500
4.8
±11.1
±13.9
Max
5.05
Units
Vdc
I
OUT
= ±250mAdc, T
C
= +25°C ART2812(dual)
I
OUT
= ±250mAdc, T
C
= +25°C ART2815(dual)
Output power
Note 5
Output current
Note 5
P
OUT
I
OUT
19 Vdc< V
IN
< 50Vdc
19 Vdc< V
IN
< 50Vdc
150 mAdc < I
OUT
< 3000 mAdc
Line regulation
Note 3
VR
LINE
19 Vdc< V
IN
< 50Vdc
±75 mAdc < I
OUT
< ±750 mAdc
150 mAdc < I
OUT
< 3000 mAdc
Load regulation
Note 4
VR
LOAD
19 Vdc< V
IN
< 50Vdc
±75 mAdc < I
OUT
< ±750 mAdc
Cross regulation
Note 8
VR
CROSS
19 Vdc< V
IN
< 50Vdc
(dual)
Total regulation
VR
All conditions of Line, Load,
(main)
Cross Regulation, Aging,
Temperature and Radiation ART2812(dual)
ART2815(dual)
I
OUT
= minimum rated, Pin 3 open
Pin 3 shorted to pin 2 (disabled)
19 Vdc< V
IN
< 50Vdc
I
OUT
= 3000 mAdc (main), ±500 mAdc (dual)
19 Vdc< V
IN
< 50Vdc
I
OUT
= 3000 mAdc (main), ±500 mAdc (dual)
Sychronization input open. (pin 6)
I
OUT
= 3000 mAdc (main), ±500 mAdc (dual)
±12.50
±15.15
30
3000
750
+15
mV
+60
+180
mV
+300
+10
mV
+500
5.2
V
±12.9
±16.0
250
8.0
70
100
mA
mV
p.p
mA
p.p
KHz
kHz
W
mAdc
Input current
Output ripple voltage
Note 6
Input ripple current
Note 6
Switching frequency
Efficiency
I
IN
V
RIP
I
RIP
F
S
Eff
225
83
275
%
For Notes to SPECIFICATIONS, refer to page 3
2
www.irf.com
ART28XXT SERIES
Electrical Performance
(Continued)
Parameter
Enable Input
open circuit voltage
drive current (sink)
voltage range
Synchronization Input
frequency range
pulse high level
pulse low level
pulse rise time
pulse duty cycle
Synchronization Output
pulse high level
pulse low level
Power dissipation, load fault
Output response to step load
changes
Notes 7, 11
Recovery time from step load
changes
Notes 11, 12
Output response to step line
changes
Notes 10, 11
Recovery time from step line
changes
Notes 10, 11,13
Turn on overshoot
V
OS
Turn on delay
Note 14
Capacitive load
Notes 9, 10
Isolation
T
DLY
CL
ISO
I
OUT
= minimum and full rated
I
OUT
= minimum and full rated
No effect on DC performance
(main)
(dual)
100
P
D
V
TLD
T
TLD
V
TLN
External clock signal on Sync. input (pin 4)
Symbol
Conditions
MIN
3.0
0.1
-0.5
225
4.5
-0.5
40
20
3.7
0.0
MAX
5.0
50.0
310
10.0
0.25
80
4.3
0.25
16
Units
V
mA
V
KHz
Khz
V
V
s
V/µS
%
V
W
mV
PK
Signal compatible with synchronization input
Short circuit, any output
10% Load to/from 50% load
50% Load to/from 100% load
10% Load to/from 50% load
50% Load to/from 100% load
I
OUT
= 3000 mAdc
V
IN
= 19 V to/from 50 V
I
OUT
= ±500 mAdc
I
OUT
= 3000 mAdc
V
IN
= 19 V to/from 50 V
I
OUT
= ±500 mAdc
(main)
(dual)
(main)
(dual)
(main)
(dual)
5.0
-350
-1050
-200
-200
200
200
200
200
350
1050
500
500
100
500
20
500
100
µs
µS
mV
PK
T
TLN
µs
µS
mV
ms
mS
µF
MΩ
500VDC Input to Output or any pin to case
(except pin 12)
Notes to SPECIFICATIONS
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
Operation outside absolute maximum/minimum limits may cause permanent damage to the device. Extended operation at the limits may permanently
degrade performance and affect reliability.
Device performance specified in Electrical Performance table is guaranteed when operated within recommended limits. Operation outside
recommended limits is not specified.
Parameter measured from 28V to 19 V or to 50V while loads remain fixed.
Parameter measured from nominal to minimum or maximum load conditions while line remains fixed.
Up to 750 mA is available from the dual outputs provided the total output power does not exceed 30W.
Guaranteed for a bandwidth of DC to 20MHz. Tested using a 20KHz to 2MHz bandwidth.
Load current is stepped for output under test while other outputs are fixed at half rated load.
Load current is fixed for output under test while other output loads are varied for any combination of minimum to maximum.
A capacitive load of any value from 0 to the specified maximum is permitted without comprise to DC performance. A capacitive load in excess of the
maximum limit may interfere with the proper operation of the converter’s short circuit protection, causing erratic behavior during turn on.
Parameter is tested as part of design characterization or after design or process changes. Thereafter, parameters shall be guaranteed to the limits
specified in the table.
Load transient rate of change, di/dt
2 A/µSec.
Recovery time is measured from the initiation of the transient to where V
OUT
has returned to within ±1% of its steady state value.
Line transient rate of change, dv/dt
50 V/µSec.
Turn on delay time is for either a step application of input power or a logical low to high transition on the enable pin (pin 3) while power is present at the
input.
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3
ART28XXT SERIES
Group A Tests
V
IN
= 28Volts, C
L
=0
unless otherwise specified.
Test
Output voltage accuracy
Symbol
V
OUT
Conditions unless otherwise specified
I
OUT
= 1.5 Adc
I
OUT
= ±250mAdc
I
OUT
= ±250mAdc
V
IN
= 19 V, 28V, 50 V
(main)
V
IN
19 V, 28V, 50 V
I
OUT
= 150, 1500, 3000mAdc
V
IN
= 19 V, 28V, 50 V
I
OUT
= ±75, ±310, ±625mAdc
I
OUT
= ±75, ±250, ±500mAdc
(main)
ART2812(dual)
ART2815(dual)
Group A
Subgroups
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
4, 5, 6
1
2, 3
1, 2, 3
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
MIN
4.95
±11.70
±14.50
3.0
150
75
4.8
±11.1
±14.0
MAX
5.05
±12.30
±15.15
30
3000
500
5.2
±12.9
±15.8
250
8.0
70
100
Units
V
Output power
Note 1
Output current
Note 1
Output regulation
Note 4
P
OUT
I
OUT
W
mA
(dual)
(main)
2812(dual)
2815(dual)
VR
V
Input current
Output ripple
Note 2
Input ripple
Note 2
Switching frequency
Efficiency
Power dissipation,
load fault
Output response to step
load changes
Notes 3, 5
Recovery time from step
load changes
Notes 5, 6
I
IN
V
RIP
I
RIP
F
S
Eff
P
D
I
OUT
= minimum rated, Pin 3 open
Pin 3 shorted to pin 2 (disabled)
V
IN
= 19 V, 28V, 50 V
I
OUT
= 3000mA main, ±500mA dual
V
IN
= 19 V, 28V, 50 V
I
OUT
= 3000mA main, ±500mA dual
Synchronization pin (pin 6) open
I
OUT
= 3000mA main, ±500mA dual
Short circuit, any output
10% Load to/from 50% load
50% Load to/from 100% load
10% Load to/from 50% load
mA
mV
P-P
mA
P-P
KHz
%
225
83
81
275
16
-200
-200
200
200
200
200
100
500
5.0
100
20
W
V
TL
mV
PK
T
TL
50% Load to/from 100% load
(main)
I
OUT
= minimum and full rated
I
OUT
= minimum and full rated
500VDC Input to output or any pin to case
(except pin 12)
µs
µS
4, 5, 6
4, 5, 6
4, 5, 6
1
Turn on overshoot
Turn on delay
Note 7
Isolation
V
OS
T
DLY
ISO
(dual)
mV
mS
ms
MΩ
Notes to Group A Test Table
1.
2.
3.
4.
5.
6.
7.
8.
Parameter verified during dynamic load regulation tests.
Guaranteed for DC to 20 MHz bandwidth. Test conducted using a 20KHz to 2MHz bandwidth.
Load current is stepped for output under test while other outputs are fixed at half rated load.
Each output is measured for all combinations of line and load. Only the minimum and maximum readings for each output are recorded.
Load step transition time
10µS.
Recovery time is measured from the initiation of the transient to where V
OUT
has returned to within ±1% of its steady state value.
Turn on delay time is tested by application of a logical low to high transition on the enable pin (pin 3) with power present at the input.
Subgroups 1 and 4 are performed at +25ºC, subgroups 2 and 5 at -55ºC and subgroups 3 and 6 at +125ºC.
4
www.irf.com
ART28XXT SERIES
Radiation Performance
The radiation tolerance characteristics inherent in the
ART28XXT converter are the direct result of a carefully
planned ground-up design program with specific radiation
design goals. After identification of the general circuit
topology, a primary task of the design effort was selection
of appropriate elements from the list of devices for which
extensive radiation effects data was available. By imposing
sufficiently large margins on those electrical parameters
subject to the degrading effects of radiation, designers
were able to select appropriate elements for incorporation
into the circuit. Known radiation data was utilized for input
to PSPICE and RadSPICE in the generation of circuit
performance verification analyses. Thus, electrical
performance capability under all environmental conditions
including radiation was well understood before first
application of power to the inputs.
A principal design goal was a converter topology that,
because of large design margins, had radiation performance
essentially independent of normal elemental lot radiation
performance variations. In the few instances where such
margins were not assured, element lots were selected
from which die were fabricated (and characterized) as
radiation hard devices so that realization of the design
goals could be assured.
Completion of first article fabrication, screening and
standard environmental testing was followed by radiation
testing to confirm design goals. All design goals were met
handily and in most cases exceeded by large margin.
These test samples were built with elements that, with the
foregoing exceptions, were
not
screened for radiation
characteristics. Additional radiation tests on subsequent
ART28XXT manufacturing lots provide continued
confirmation of the soundness of the design goals as well
as justification for the element selection criteria.
The following table specifies guaranteed minimum radiation
exposure levels tolerated while maintaining specification
limits.
Radiation Performance Characteristics
Test Inspection
Total Ionizing Dose (Gamma)
Dose Rate (Gamma Dot)
Temporary Saturation
Survival
Neutron Fluence
Single Event Effects
SEU, SEL, SEGR, SEB
Method
MIL-PRF-883, Method 1019
Operating bias applied during exposure,
Full Rated Load, V
IN
= 28V
MIL-STD-883, Method 1023
Operating bias applied during exposure,
Full Rated Load, V
IN
= 28V
MIL-STD-883, Method 1017
Heavy Ions (LET)
Operating bias applied during exposure,
Full Rated Load, V
IN
= 28V
Test lab: Brookhaven National Laboratory,
Tandem Van de Graaff Generator
Min
Typ
Unit
200
1E8
4E10
8E12
300
Krads(Si)
Rads(Si)/sec
1E11
1E13
Neutrons/cm
2
83
MeV
x
cm /mg
2
International Rectifier currently does not have a DLA Land and Maritime certified Radiation Hardness
Assurance Program.
Standard Periodic Inspections on ART28XXT Series
As prescribed by MIL-PRF-38534 for Option 2
Inspection
Group A
Group B
Group C
Group D
Application
Part of Screening on Each Unit
Each Inspection Lot
First Inspection Lot or
Following Class 1 Change
In Line (Part of Element Evaluation)
Quantity
100%
5 units
10 Units
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5
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