MACH221-20JC datasheet, PDF - EEWORLD Datasheet

MACH221-20JC: DescriptionEE PLD, 24ns, 96-Cell, CMOS, PQCC68, PLASTIC, LCC-68; CategoryProgrammable logic devices Programmable logic; File Size58KB，2 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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MACH221-20JC Overview

EE PLD, 24ns, 96-Cell, CMOS, PQCC68, PLASTIC, LCC-68

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	LCC
package instruction	QCCJ, LDCC68,1.0SQ
Contacts	68
Reach Compliance Code	unknown
Other features	BURIED MACROCELLS; 4 EXTERNAL CLOCKS; SHARED INPUT/CLOCK
maximum clock frequency	38.5 MHz
In-system programmable	NO
JESD-30 code	S-PQCC-J68
JESD-609 code	e0
JTAG BST	NO
length	24.2062 mm
Dedicated input times	4
Number of I/O lines	48
Number of macro cells	96
Number of terminals	68
Maximum operating temperature	70 °C
Minimum operating temperature
organize	4 DEDICATED INPUTS, 48 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	EE PLD
propagation delay	24 ns
Certification status	Not Qualified
Maximum seat height	4.57 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	24.2062 mm
Base Number Matches	1

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