IDT72521L25G datasheet, PDF - EEWORLD Datasheet

IDT72521L25G: DescriptionBi-Directional FIFO, 2KX18, 25ns, Asynchronous, MOS, CPGA68, CAVITY-UP, PGA-68; Categorystorage storage; File Size435KB，28 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT72521L25G Overview

Bi-Directional FIFO, 2KX18, 25ns, Asynchronous, MOS, CPGA68, CAVITY-UP, PGA-68

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	PGA
package instruction	CAVITY-UP, PGA-68
Contacts	68
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	25 ns
Other features	BYPASS XCVR
Maximum clock frequency (fCLK)	28.6 MHz
period time	35 ns
JESD-30 code	S-CPGA-P68
JESD-609 code	e0
length	29.464 mm
memory density	36864 bit
Memory IC Type	BI-DIRECTIONAL FIFO
memory width	18
Number of functions	1
Number of terminals	68
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2KX18
Output characteristics	3-STATE
Exportable	NO
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA68,11X11
Package shape	SQUARE
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum seat height	5.207 mm
Maximum slew rate	0.23 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	MOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
width	29.464 mm
Base Number Matches	1

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