Features
•
High-performance, Low-power AVR
®
8-bit Microcontroller
•
Advanced RISC Architecture
– 133 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers + Peripheral Control Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-chip 2-cycle Multiplier
Non volatile Program and Data Memories
– 32K/64K/128K Bytes of In-System Reprogrammable Flash (AT90CAN32/64/128)
• Endurance: 10,000 Write/Erase Cycles
– Optional Boot Code Section with Independent Lock Bits
• Selectable Boot Size: 1K Bytes, 2K Bytes, 4K Bytes or 8K Bytes
• In-System Programming by On-Chip Boot Program (CAN, UART, ...)
• True Read-While-Write Operation
– 1K/2K/4K Bytes EEPROM (Endurance: 100,000 Write/Erase Cycles) (AT90CAN32/64/128)
– 2K/4K/4K Bytes Internal SRAM (AT90CAN32/64/128)
– Up to 64K Bytes Optional External Memory Space
– Programming Lock for Software Security
JTAG (IEEE std. 1149.1 Compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Programming Flash (Hardware ISP), EEPROM, Lock & Fuse Bits
– Extensive On-chip Debug Support
CAN Controller 2.0A & 2.0B - ISO 16845 Certified
(1)
– 15 Full Message Objects with Separate Identifier Tags and Masks
– Transmit, Receive, Automatic Reply and Frame Buffer Receive Modes
– 1Mbits/s Maximum Transfer Rate at 8 MHz
– Time stamping, TTC & Listening Mode (Spying or Autobaud)
Peripheral Features
– Programmable Watchdog Timer with On-chip Oscillator
– 8-bit Synchronous Timer/Counter-0
• 10-bit Prescaler
• External Event Counter
• Output Compare or 8-bit PWM Output
– 8-bit Asynchronous Timer/Counter-2
• 10-bit Prescaler
• External Event Counter
• Output Compare or 8-Bit PWM Output
• 32Khz Oscillator for RTC Operation
– Dual 16-bit Synchronous Timer/Counters-1 & 3
• 10-bit Prescaler
• Input Capture with Noise Canceler
• External Event Counter
• 3-Output Compare or 16-Bit PWM Output
• Output Compare Modulation
– 8-channel, 10-bit SAR ADC
• 8 Single-ended Channels
• 7 Differential Channels
• 2 Differential Channels With Programmable Gain at 1x, 10x, or 200x
– On-chip Analog Comparator
– Byte-oriented Two-wire Serial Interface
– Dual Programmable Serial USART
– Master/Slave SPI Serial Interface
• Programming Flash (Hardware ISP)
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– 8 External Interrupt Sources
– 5 Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down & Standby
– Software Selectable Clock Frequency
– Global Pull-up Disable
I/O and Packages
– 53 Programmable I/O Lines
– 64-lead TQFP and 64-lead QFN
Operating Voltages: 2.7 - 5.5V
Operating temperature: Industrial (-40°C to +85°C)
Maximum Frequency: 8 MHz at 2.7V, 16 MHz at 4.5V
1. Details on
section 19.4.3 on page 242.
•
•
•
•
8-bit
Microcontroller
with
32K/64K/128K
Bytes of
ISP Flash
and
CAN Controller
AT90CAN32
AT90CAN64
AT90CAN128
Summary
•
•
•
•
•
Note:
Rev. 7679HS–CAN–08/08
1. Description
1.1
Comparison Between AT90CAN32, AT90CAN64 and AT90CAN128
AT90CAN32, AT90CAN64 and AT90CAN128 are hardware and software compatible. They dif-
fer only in memory sizes as shown in
Table 1-1.
Table 1-1.
Device
AT90CAN32
AT90CAN64
AT90CAN128
Memory Size Summary
Flash
32K Bytes
64K Bytes
128K Bytes
EEPROM
1K Byte
2K Bytes
4K Byte
RAM
2K Bytes
4K Bytes
4K Bytes
1.2
Part Description
The AT90CAN32/64/128 is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the
AT90CAN32/64/128 achieves throughputs approaching 1 MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
The AVR core combines a rich instruction set with 32 general purpose working registers. All 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers.
The AT90CAN32/64/128 provides the following features: 32K/64K/128K bytes of In-System Pro-
grammable Flash with Read-While-Write capabilities, 1K/2K/4K bytes EEPROM, 2K/4K/4K
bytes SRAM, 53 general purpose I/O lines, 32 general purpose working registers, a CAN con-
troller, Real Time Counter (RTC), four flexible Timer/Counters with compare modes and PWM, 2
USARTs, a byte oriented Two-wire Serial Interface, an 8-channel 10-bit ADC with optional differ-
ential input stage with programmable gain, a programmable Watchdog Timer with Internal
Oscillator, an SPI serial port, IEEE std. 1149.1 compliant JTAG test interface, also used for
accessing the On-chip Debug system and programming and five software selectable power sav-
ing modes.
The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI/CAN ports and
interrupt system to continue functioning. The Power-down mode saves the register contents but
freezes the Oscillator, disabling all other chip functions until the next interrupt or Hardware
Reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to main-
tain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops
the CPU and all I/O modules except Asynchronous Timer and ADC, to minimize switching noise
during ADC conversions. In Standby mode, the Crystal/Resonator Oscillator is running while the
rest of the device is sleeping. This allows very fast start-up combined with low power
consumption.
The device is manufactured using Atmel’s high-density nonvolatile memory technology. The On-
chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial
interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program
running on the AVR core. The boot program can use any interface to download the application
program in the application Flash memory. Software in the Boot Flash section will continue to run
while the Application Flash section is updated, providing true Read-While-Write operation. By
2
AT90CAN32/64/128
7679HS–CAN–08/08
AT90CAN32/64/128
combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip,
the Atmel AT90CAN32/64/128 is a powerful microcontroller that provides a highly flexible and
cost effective solution to many embedded control applications.
The AT90CAN32/64/128 AVR is supported with a full suite of program and system development
tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emula-
tors, and evaluation kits.
1.3
Disclaimer
Typical values contained in this datasheet are based on simulations and characterization of
other AVR microcontrollers manufactured on the same process technology. Min and Max values
will be available after the device is characterized.
3
7679HS–CAN–08/08
1.4
Block Diagram
Block Diagram
Figure 1-1.
PF7 - PF0
PA7 - PA0
PC7 - PC0
VCC
GND
PORTF DRIVERS
PORTA DRIVERS
PORTC DRIVERS
DATA REGISTER
PORTF
DATA DIR.
REG. PORTF
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
DATA REGISTER
PORTC
DATA DIR.
REG. PORTC
8-BIT DATA BUS
AVCC
AGND
AREF
JTAG TAP
PROGRAM
COUNTER
ADC
POR - BOD
RESET
INTERNAL
OSCILLATOR
CALIB. OSC
STACK
POINTER
WATCHDOG
TIMER
OSCILLATOR
OSCILLATOR
CAN
CONTROLLER
ON-CHIP DEBUG
PROGRAM
FLASH
SRAM
MCU CONTROL
REGISTER
TIMING AND
CONTROL
BOUNDARY-
SCAN
INSTRUCTION
REGISTER
GENERAL
PURPOSE
REGISTERS
X
Y
Z
TIMER/
COUNTERS
PROGRAMMING
LOGIC
INSTRUCTION
DECODER
INTERRUPT
UNIT
CONTROL
LINES
ALU
EEPROM
STATUS
REGISTER
USART0
SPI
USART1
TWO-WIRE SERIAL
INTERFACE
ANALOG
COMPARATOR
DATA REGISTER
PORTE
DATA DIR.
REG. PORTE
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
+
-
DATA REG.
PORTG
DATA DIR.
REG. PORTG
PORTE DRIVERS
PORTB DRIVERS
PORTD DRIVERS
PORTG DRIVERS
PE7 - PE0
PB7 - PB0
PD7 - PD0
PG4 - PG0
4
AT90CAN32/64/128
7679HS–CAN–08/08
RESET
XTAL1
XTAL2
AT90CAN32/64/128
1.5
Pin Configurations
Pinout AT90CAN32/64/128 - TQFP
PF5 (ADC5 / TMS)
PF4 (ADC4 / TCK)
PF6 (ADC6 / TDO)
PF7 (ADC7 / TDI)
Figure 1-2.
PF1 (ADC1)
PF0 (ADC0)
PF2 (ADC2)
PF3 (ADC3)
PA0 (AD0)
64
62
51
PA1 (AD1)
50
AVCC
AREF
GND
GND
61
60
55
63
54
53
59
58
57
NC
(1)
56
52
49
PA2 (AD2)
VCC
1
2
3
4
5
6
7
8
9
48
47
PA3 (AD3)
PA4 (AD4)
PA5 (AD5)
PA6 (AD6)
PA7 (AD7)
PG2 (ALE)
PC7 (A15 / CLKO)
PC6 (A14)
PC5 (A13)
PC4 (A12)
PC3 (A11)
PC2 (A10)
PC1 (A9)
PC0 (A8)
PG1 (RD)
PG0 (WR)
(RXD0 / PDI) PE0
(TXD0 / PDO) PE1
(XCK0 / AIN0) PE2
(OC3A / AIN1) PE3
(OC3B / INT4) PE4
(OC3C / INT5) PE5
(T3 / INT6) PE6
(ICP3 / INT7) PE7
INDEX CORNER
46
45
44
43
42
(64-lead TQFP top view)
41
40
39
38
37
36
35
34
33
(SS) PB0 10
(SCK) PB1 11
(MOSI) PB2
12
(MISO) PB3 13
(OC2A) PB4 14
(OC1A) PB5
(OC1B) PB6
15
16
(TXD1 / INT3) PD3 28
(SCL / INT0) PD0 25
(OC0A / OC1C) PB7 17
(TOSC2 ) PG3 18
(TOSC1 ) PG4 19
(ICP1) PD4 29
GND 22
XTAL2 23
RESET 20
XTAL1 24
VCC 21
(TXCAN / XCK1) PD5 30
(RXCAN / T1) PD6 31
(SDA / INT1) PD1 26
(RXD1 / INT2) PD2 27
(T0) PD7 32
(2)
(1)
(2)
NC = Do not connect (May be used in future devices)
Timer2 Oscillator
(2)
5
7679HS–CAN–08/08