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KM44C1004DT-5

Description
EDO DRAM, 1MX4, 50ns, CMOS, PDSO20, 0.300 INCH, TSOP2-26/20
Categorystorage    storage   
File Size414KB,22 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

KM44C1004DT-5 Overview

EDO DRAM, 1MX4, 50ns, CMOS, PDSO20, 0.300 INCH, TSOP2-26/20

KM44C1004DT-5 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeTSOP
package instructionTSOP2, TSOP20/26,.36
Contacts20
Reach Compliance Codeunknown
ECCN codeEAR99
access modeFAST PAGE WITH EDO
Maximum access time50 ns
Other featuresCAS BEFORE RAS/RAS ONLY/HIDDEN REFRESH
I/O typeCOMMON
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length17.14 mm
memory density4194304 bit
Memory IC TypeEDO DRAM
memory width4
Number of functions1
Number of ports1
Number of terminals20
word count1048576 words
character code1000000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize1MX4
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP20/26,.36
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
refresh cycle1024
Maximum seat height1.2 mm
self refreshNO
Maximum standby current0.001 A
Maximum slew rate0.085 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
Base Number Matches1
KM44C1004D, KM44V1004D
1M x 4Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
CMOS DRAM
This is a family of 1,048,576 x 41bit Extended Data Out CMOS DRAMs. Extended Data Out offers high speed random access of memory
cells within the same row. Power supply voltage (+5V or +3.3V), access time (-5, -6 or -7), power consumption(Normal or Low power),
and package type (SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh
and Hidden refresh capabilities.
This 1Mx4 Extended Data Out DRAM family is fabricated using Samsung′s advanced CMOS process to realize high band-width, low
power consumption and high reliability. It may be used as main memory for main frames and mini computers, personal computer and
high performance microprocessor systems.
FEATURES
• Part Identification
- KM44C1004D/D-L(5V)
- KM44V1004D/D-L(3.3V)
• Extended Data Out operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (3.3V, L-ver only)
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early write or output enable controlled write
• JEDEC Standard pinout
Active Power Dissipation
Unit : mW
Speed
-5
-6
-7
3.3V
-
220
200
5V
468
413
358
• Available in 26(20)-pin SOJ 300mil and TSOP(II)
300mil packages
• Single +5V±10% power supply(5V product)
• Single +3.3V±0.3V power supply(3.3V product)
FUNCTIONAL BLOCK DIAGRAM
Refresh Cycles
Part
NO.
KM44C1004D
KM44V1004D
Refresh
cycle
1K
Refresh Period
Normal
16ms
L-ver
128ms
RAS
CAS
W
Control
Clocks
VBB Generator
Vcc
Vss
Refresh Timer
Refresh Control
Row Decoder
Sense Amps & I/O
Data in
Buffer
Performance Range
Spee
-5
-6
-7
Refresh Counter
Memory Array
1,048,576 x4
Cells
DQ0
to
DQ3
Data out
Buffer
t
RAC
50n
60n
70n
t
CAC
15ns
15ns
20ns
t
RC
84ns
104ns
124ns
t
HPC
20ns
25ns
30ns
Remark
5V only
5V/3.3V
5V/3.3V
A0~A9
Row Address Buffer
Col. Address Buffer
Column Decoder
OE
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
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