DUAL 150MA HIGH PERFORMANCE MOBILE LDO
TM
IN USP6
FSP2151
FEATURES
180mV Typical Dropout with 150mA Load
±2.0%
Voltage Accuracy
High PSRR: 70dB@100Hz
Low noise output
Current Limit
Thermal Shutdown Protection
Short Circuit Protection
Very small USP6 Package
GENERAL DESCRIPTION
The dual LDO FSP2151 series of positive voltage
linear regulators feature high output voltage accuracy,
low quiescent current and low dropout voltage, making
them ideal for battery powered applications. The line
transient response and load transient response are
excellent. Their high PSRR make them useful in
applications where AC noise on the input power supply
must be suppressed. Space-saving USP6 package for
2ch LDOs is attractive for portable and handheld
applications. They have both thermal shutdown and a
current limit feature to prevent device failure under
extreme operating conditions. They are stable with an
output capacitance of 2.2uF or greater.
APPLICATIONS
Cellular Handsets
Portable Electronics, PDA
Wireless Devices, LAN
Computer Peripherals
Camera Module
GPS Receiver
PIN CONFIGURATION
(Bottom View)
PIN DESCRIPTION
Pin Number
1
2
3
4
5
6
Pin Name
EN2
VDD
EN1
GND
VOUT1
VOUT2
Pin Function
Enable pin for LDO2. Connect EN2 to IN or to a logic high for normal
operation, drive EN2 to G or a logic low to disable the regulator. Do not
leave EN2 floating.
Input Voltage. Bypass this pin with a 1µF capacitor connected to G, placed
as close to the IC as possible.
Enable pin for LDO1. Connect EN1 to IN or to a logic high for normal
operation, drive EN1 to G or a logic low to disable the regulator. Do not
leave EN1 floating.
Ground.
LDO1 Output. Bypass this pin with a 1µF capacitor connected to G. OUT1 is
actively discharged to G through 800Ω when disabled.
LDO2 Output. Bypass this pin with a 1µF capacitor connect to G. OUT2 is
actively discharged to G through 800Ω when disabled.
1/9
2007-7-4
DUAL 150MA HIGH PERFORMANCE MOBILE LDO
TM
IN USP6
FSP2151
ABSOLUTE MAXIMUM RATINGS
Parameter
Input Voltage
Output Pin Voltage
Output Current
Internal Power Dissipation)
ESD Rating(HBM)
Operating Junction Temperature
Operating Ambient Temperature
Storage Temperature
Rating
6
GND-0.3 to VIN + 0.3
150/150
100
2000
-40 to 125
-40 to 85
-40 to 125
Unit
V
V
mA
mW
V
°C
°C
°C
°C
Lead Temperature (Soldering, 5 sec)
300
Note: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired
(V
IN
= V
OUT
+ 1V, EN1 =EN2= IN, C
IN
= 2.2F, C
OUT
= 2.2F, T
A
= 25
°
C unless otherwise specified.)
Parameter
Input Supply Range
EN Input Voltage
Output Voltage Accuracy
Output Current
Quiescent Current
Shutdown Supply Current
Short Circuit Current
Ground Pin Current
Line Regulation
Load Regulation
Power Supply Ripple
Rejection
I
O
=0mA
Both outputs disabled
V
O
= 0V
I
O
=0mA to 150mA
I
O
=50mA V
IN
= 3.0V to 4.0V
I
O
=50mA V
IN
= 3.5V to 4.5V
I
O
=50mA V
IN
= 3.8V to 4.8V
V
O
= 1.8V
V
O
= 2.5
V
O
= 2.8V
-2
1.0
70
63
45
950
350
180
200
35
40
155
0.3
1.5
1.7
5
15
2
-0.15
0.1
0.15
I
O
=1mA
Test Conditions
Min
Note 1
0
-2.0
150
175
0.1
150
200
250
Typ
Max
5.5
VIN
+2.0
Note 2
250
1
ELECTRICAL CHARACTERISTICS
Unit
V
V
%
mA
µA
µA
mA
µA
%/V
%/mA
dB
I
OUT
= 1mA to 150mA V
IN
= 3.3V
f= 100Hz
I
O
=50mA V
O
= 1.8V
f= 1KHz
f= 10KHz
V
OUT
= 1.8V, I
OUT
= 150mA
V
OUT
= 2.5V, I
OUT
= 150mA
V
OUT
= 2.8V, I
OUT
= 150mA
V
OUT
≥1.2V
f= 10Hz to 100KHz
I
O
=1mA
I
O
=1mA
Dropout Voltage
Current Limit
Output Noise
Over Temperature Hystersis
Over Temperature Shutdown
EN_ Logic Low Threshold
EN_ Logic High Threshold
EN Pull-up Resistance
mV
mA
uVrms
°C
°C
V
V
mΩ
Temperature Coefficient
40
ppm/°C
Note 1：The minimum input voltage of the FSP2151 is determined by output voltage and dropout voltage. The
minimum input voltage is defined as:
V
IN(MIN)
=V
O
+V
DROP
Note 2：Output current is limited by P
D
, maximum I
O
=P
D
/(V
IN(MAX)
-V
O
)
2/9
2007-7-4
DUAL 150MA HIGH PERFORMANCE MOBILE LDO
TM
IN USP6
FSP2151
FUNCTIONAL BLOCK DIAGRAM
TYPICAL APPLICATION CIRCUIT
APPLICATION INFORMATION
Capacitor Selection and Regulator Stability
Similar to any low dropout regulator, the external capacitors used with the FSP2151 must be carefully selected for
regulator stability and performance.
Using a capacitor, C
IN
, whose value is＞2.2μF at the FSP2151 input pin, the amount of the capacitance can be
increased without limit. Please note that the distance between C
IN
and the input pin of the FSP2151 should not
exceed 0.5 inch. Ceramic capacitors are suitable for the FSP2151. Capacitors with larger values and lower ESR
provide better PSRR and line-transient response.
The FSP2151 is designed specifically to work with low ESR ceramic output capacitors in order to save space and
improve performance. Using an output ceramic capacitor whose value is
＞2.2μF
with ESR＞5mΩ ensure stability.
Shutdown Input Operation
The FSP2151 is shutdown by pulling the EN input low, and is turned on by tying the EN input to VIN or leaving the
EN input floating.
Dropout Voltage
A regulator’s minimum dropout voltage determines the lowest usable supply voltage. The FSP2151 has a typical
180mV dropout voltage. In battery powered systems, this will determine the useful end-of-life battery voltage.
Current Limit and Short Circuit Protection
The FSP2151 features a current limit, which monitors and controls the gate voltage of the pass transistor. The output
current can be limited to 300mA by regulating the gate voltage. The FSP2151 also has a built-in short circuit current
limit.
3/9
2007-7-4
DUAL 150MA HIGH PERFORMANCE MOBILE LDO
TM
IN USP6
FSP2151
TYPICAL PERFORMANCE CHARACTERISTICS
(C
IN
= 2.2uF, C
O
= 2.2uF, T
A
= 25°C unless otherwise specified.)
4/9
2007-7-4
DUAL 150MA HIGH PERFORMANCE MOBILE LDO
TM
IN USP6
FSP2151
TYPICAL PERFORMANCE CHARACTERISTICS（CONTINUED）
(C
IN
= 2.2uF, C
O
= 2.2uF, T
A
= 25°C unless otherwise specified.)
5/9
2007-7-4
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