Ordering number : ENA1157
LV8760T
Overview
Bi-CMOS LSI
Forward/Reverse H-bridge Driver
The LV8760T is an H-bridge driver that can control four operation modes (forward, reverse, brake, and standby) of a
motor. The low on-resistance, zero standby current, highly efficnet IC is optimal for use in driving brushed DC motors for
office equipment.
Features
•
Forward/reverse H-bridge motor driver: 1 channel
•
Built-in current limiter circuit
•
Built-in thermal protection circuit
•
Built-in short-circuit protection function
Specifications
Absolute Maximum Ratings
at Ta = 25°C
Parameter
Supply voltage
Symbol
VM max
VCC max
Output peak current
Output continuous current
Logic input voltage
Allowable power dissipation
Operating temperature
Storage temperature
IO peak
IO max
VIN
Pd max
Topr
Tstg
Mounted on a specified board. *
tw
≤
20ms, duty 5%
Conditions
Ratings
38
6
4
3
-0.3 to VCC+0.3
3.3
-20 to +85
-55 to +150
Unit
V
V
A
A
V
W
°C
°C
* Specified circuit board : 90mm×90mm×1.6mm, glass epoxy 2-layer board (2S0P), with backside mounting.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer
'
s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
'
s products or
equipment.
42308 MS PC 20080319-S00001 No.A1157-1/10
LV8760T
Allowable Operating Ratings
at Ta = 25°C
Parameter
Supply voltage range
Symbol
VM
VCC
VREF input voltage
Logic input voltage
VREF
VIN
Conditions
Ratings
9 to 35
3 to 5.5
0 to VCC-1.8
0 to VCC
Unit
V
V
V
V
Electrical Characteristics
at Ta = 25°C, VM = 24V, VCC = 5V, VREF = 1.5V
Parameter
General
Standby mode current drain 1
Standby mode current drain 2
Operating mode current drain 1
Operating mode current drain 2
VREG output voltage
VCC low-voltage cutoff voltage
Low-voltage hysteresis voltage
Thermal shutdown temperature
Thermal hysteresis width
Output block
Output on resistance
Ron1
Ron2
Output leakage current
Rising time
Falling time
Input output delay time
IOleak
tr
tf
tpLH
tpHL
Charge pump block
Step-up voltage
Rising time
Oscillation frequency
Control system input block
Logic pin input current 1
IINL
IINH
Logic pin input current 2
IINL
IINH
Logic pin input H-level voltage
Logic pin input L-level voltage
Current limiter block
VREF input current
Current limit comparator
threshold voltage
Short-circuit protection block
SCP pin charge current
Comparator threshold voltage
Iscp
Vthscp
SCP = 0V
3.5
0.8
5
1
6.5
1.2
μA
V
IREF
Vthlim
VREF = 1.5V
-0.5
0.285
0.3
0.315
μA
V
VINH
VINL
VIN = 0.8V adaptive pin : PS
VIN = 5V adaptive pin : PS
VIN = 0.8V adaptive pin : IN1, IN2
VIN = 5V adaptive pin : IN1, IN2
adaptive pin : PS, IN1, IN2
adaptive pin : PS, IN1, IN2
5.6
56
5.6
35
2.0
0.8
8
80
8
50
10.4
104
10.4
65
μA
μA
μA
μA
V
V
VGH
tONG
Fcp
VM = 24V
VG = 0.1μF
115
28.0
28.7
250
140
29.8
500
165
V
μs
kHz
IO = 3A, sink side
IO = -3A, source side
VO = 35V
10% to 90%
90% to 10%
IN1 or IN2 to OUTA or OUTB (L
→
H)
IN1 or IN2 to OUTA or OUTB (H
→
L)
200
200
550
550
0.2
0.32
0.25
0.40
50
500
500
700
700
Ω
Ω
μA
ns
ns
ns
ns
IMst
ICCst
IM
ICC
VREG
VthVCC
VthHIS
TSD
ΔTSD
Design guarantee *
Design guarantee *
PS = “L”
PS = “L”
PS = “H”, IN1 = “H”, with no load
PS = “H”, IN1 = “H”, with no load
IO = -1mA
4.75
2.5
120
155
1
3
5
2.7
150
170
40
1
1
1.3
4
5.25
2.9
180
185
μA
μA
mA
mA
V
V
mV
°C
°C
Symbol
Conditions
min
Ratings
typ
max
Unit
* Design guarantee value and no measurement is made.
No.A1157-2/10
LV8760T
Package Dimensions
unit : mm (typ)
3279
TOP VIEW
6.5
20
11
BOTTOM VIEW
4.4
6.4
1
0.65
(0.33)
0.22
10
0.15
0.5
Exposed Die-Pad
SIDE VIEW
0.08
1.2max
(1.0)
SANYO : TSSOP20J(225mil)
Pin Assignment
PGND 1
OUTB 2
OUTB 3
RNF 4
RNF 5
VM 6
VM 7
OUTA 8
OUTA 9
PS 10
20 VCC
19 SCP
18 VREF
17 IN2
16 IN1
15 REG5
14 CP1
13 CP2
12 VG
11 GND
LV8760T
No.A1157-3/10
LV8760T
Pd max – Ta
*1 With Exposed Die-Pad substrate
*2 Without Exposed Die-Pad
4.0
Allowable power dissipation, Pd max – W
3.30
3.0
*1
2.0
1.60
*2
1.72
1.0
0.83
0
–
20
0
20
40
60
80
100
Ambient temperature, Ta – °C
Substrate Specifications
(Substrate recommended for operation of LV8760T)
Size
: 90mm × 90mm × 1.6mm (two-layer substrate [2S0P])
Material
: Glass epoxy
Copper wiring density : L1 = 95% / L2 = 95%
L1 : Copper wiring pattern diagram
L2 : Copper wiring pattern diagram
Cautions
1) The data for the case with the Exposed Die-Pad substrate mounted shows the values when 90% or more of the
Exposed Die-Pad is wet.
2) For the set design, employ the derating design with sufficient margin.
Stresses to be derated include the voltage, current, junction temperature, power loss, and mechanical stresses such as
vibration, impact, and tension.
Accordingly, the design must ensure these stresses to be as low or small as possible.
The guideline for ordinary derating is shown below :
(1)Maximum value 80% or less for the voltage rating
(2)Maximum value 80% or less for the current rating
(3)Maximum value 80% or less for the temperature rating
3) After the set design, be sure to verify the design with the actual product.
Confirm the solder joint state and verify also the reliability of solder joint for the Exposed Die-Pad, etc.
Any void or deterioration, if observed in the solder joint of these parts, causes deteriorated thermal conduction,
possibly resulting in thermal destruction of IC.
No.A1157-4/10
M
+ -
Block Diagram
CP1 CP2
VG
VM
OUTA
OUTB
RNF
Charge pump
PGND
Output preamplifier stage
Output preamplifier stage
REG5
Reference
Voltage
Circuit
TSD
LVS
Output control
logic
Oscillation
circuit
-
+
Short-circuit
Protection Circuit
Current
Limiter
Circuit
-
+
VREF
LV8760T
PS
VCC
+ -
SCP
GND
No.A1157-5/10
IN1
IN2
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