IDT71682LA55CI datasheet, PDF - EEWORLD Datasheet

IDT71682LA55CI: DescriptionStandard SRAM, 4KX4, 55ns, CMOS, CDIP24; Categorystorage storage; File Size738KB，11 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT71682LA55CI Overview

Standard SRAM, 4KX4, 55ns, CMOS, CDIP24

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Reach Compliance Code	unknown
Maximum access time	55 ns
I/O type	SEPARATE
JESD-30 code	R-XDIP-T24
JESD-609 code	e0
memory density	16384 bit
Memory IC Type	STANDARD SRAM
memory width	4
Number of terminals	24
word count	4096 words
character code	4000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	4KX4
Output characteristics	3-STATE
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Base Number Matches	1

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