Drives either a 50-Ohm or 75-Ohm transmission line
Low-input capacitance
250 ps typical output-to-output skew
19 ps typical DJ jitter
Typical propagation delay < 3.5 ns
High-speed operation > 500 MHz
Industrial versions available
Available packages include: SOIC, SSOP
Description
The Cypress series of network circuits are produced using
advanced 0.35-micron CMOS technology, achieving the
industry’s fastest logic and buffers.
The Cypress CY2CC810 fanout buffer features one input and
ten outputs. Designed for data communications clock
management applications, the large fanout from a single input
reduces loading on the input clock.
AVCMOS-type outputs dynamically adjust for variable
impedance matching and reduce noise overall.
.
Block Diagram
Q1
Q2
Pin Configuration
IN
GND
Q1
VDD
Q2
GND
Q3
VDD
Q4
GND
CY2CC810
VD D
Q3
Q4
Q5
Q6
Q7
IN
INPUT
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VDD
Q10
Q9
GND
Q8
VDD
Q7
GND
Q6
Q5
GND
Q8
Q9
Q 10
OUTPUT
(AVCMOS)
20 pin SOIC/SSOP
Pin Description
Pin Number
1
2, 6, 10, 13, 17
4, 8, 15, 20
3, 5, 7, 9, 11, 12, 14, 16, 18, 19
Pin Name
IN
GND
Input
Ground
Power Supply
Output
Description
LVCMOS
Power
Power
AVCMOS
V
DD
Q1... Q10
Cypress Semiconductor Corporation
Document #: 38-07056 Rev. *E
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised September 5, 2006
CY2CC810
Absolute Maximum Conditions
[1, 2]
Parameter
V
DD
V
IN
V
OUT
T
S
T
A
V
DD
Ground Supply voltage
Input Supply Voltage to Ground Potential
Output Supply Voltage to Ground Potential
Temperature, Storage
Temperature, Operating Ambient
Power Dissipation
Description
Min.
–0.5
–0.5
–0.5
–65
–40
0.75
Max.
4.6
5.8
V
DD
+1
150
85
Unit
V
V
V
°C
°C
W
DC Electrical Characteristics
@ 3.3V (see
Figure 5)
Parameter
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
I
I
V
IK
I
OK
O
OFF
V
H
Description
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Input High Current
Clamp Diode Voltage
Continuous Clamp Current
Power down Disable
Input Hysteresis
Conditions
V
DD
= Min., V
IN
= V
IH
or V
IL
V
DD
= Min., V
IN
= V
IH
or V
IL
Guaranteed Logic High Level
Guaranteed Logic Low Level
V
DD
= Max.
V
DD
= Max.
V
DD
= Max., V
IN
= V
DD
(Max.)
V
DD
= Min., I
IN
= –18 mA
V
DD
= Max., V
OUT
= GND
V
DD
= GND, V
OUT
= < 4.5V
V
DD
= Min., V
IN
= V
IH
or V
IL
V
IN
= 2.7V
V
IN
= 0.5V
I
OH
= –12 mA
I
OL
= 12 mA
Min.
2.3
2
Typ.
3.3
0.2
Max.
0.5
5.8
0.8
1
–1
20
Unit
V
V
V
V
µA
µA
µA
V
mA
µA
mV
–0.7
–1.2
–50
100
80
DC Electrical Characteristics
@ 2.5V (see
Figure 1)
Parameter
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
I
I
V
IK
I
OK
O
OFF
V
H
Description
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Input High Current
Clamp Diode Voltage
Continuous Clamp Current
Power-down Disable
Input Hysteresis
Conditions
V
DD
= Min., V
IN
= V
IH
or V
IL
V
DD
= Min., V
IN
= V
IH
or V
IL
Guaranteed Logic High Level
Guaranteed Logic Low Level
V
DD
= Max.
V
DD
= Max.
V
DD
= Max., V
IN
= V
DD
(Max.)
V
DD
= Min., I
IN
= –18 mA
V
DD
= Max., V
OUT
= GND
V
DD
= GND, V
OUT
= < 4.5V
V
IN
= 2.4V
V
IN
= 0.5V
I
OH
= –7 mA
I
OH
= 12 mA
I
OL
= 12 mA
Min.
1.8
1.6
Typ.
Max.
Unit
V
V
0.65
1.6
5.0
0.8
1
–1
20
–0.7
–1.2
–50
100
80
V
V
V
µA
µA
µA
V
mA
µA
mV
Capacitance
Parameter
Cin
Cout
Description
Input Capacitance
Output Capacitance
V
IN
= 0V
V
OUT
= 0V
Test Conditions
Min.
Typ.
2.5
6.5
Max.
Unit
pF
pF
Note
1. Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
Document #: 38-07056 Rev. *E
Page 2 of 9
CY2CC810
Power Supply Characteristics
(see
Figure 5)
Parameter
∆
ICC
I
CCD
I
C
Description
Delta I
CC
Quiescent Power
Supply Current
Dynamic Power Supply
Current
Test Conditions
(I
DD
@ V
DD
= Max. and V
IN
= V
DD
) – (I
DD
@ V
DD
= Max.
and V
IN
= V
DD
– 0.6V)
V
DD
= Max.
Input toggling 50% Duty Cycle, Outputs Open
Min.
Typ.
Max.
50
0.63
25
Unit
µA
mA/
MHz
mA
Total Power Supply Current V
DD
= Max.
Input toggling 50% Duty Cycle, Outputs Open
fL = 40 MHZ
Power-up time for all V
DD
s
Power-up to reach minimum specified voltage
(power ramp must be monotonic)
0.05
t
PU
500
ms
High-frequency Parametrics
Parameter
D
J
Description
Jitter, Deterministic
Test Conditions
50% duty cycle t
W
(50–50)
The “point to point load circuit”
Output Jitter – Input Jitter
50% duty cycle t
W
(50–50)
Standard Load Circuit.
50% duty cycle t
W
(50–50)
The “point to point load circuit”
F
max(2.5V
F
max(20)
Maximum frequency
V
DD
= 2.5 V
Maximum frequency
V
DD
= 3.3 V
Maximum frequency
V
DD
= 2.5 V
t
W
Minimum pulse
V
DD
= 3.3 V
Minimum pulse
V
DD
= 2.5 V
The “point to point load circuit”
V
IN
= 2.4V/0.0V V
OUT
= 1.7V/0.7V
20% duty cycle t
W
(20–80)
The “point to point load circuit”
V
IN
= 3.0V/0.0V V
OUT
= 2.3V/0.4V
The “point to point load circuit”
V
IN
= 2.4V/0.0V V
OUT
= 1.7V/0.7V
The “point to point load circuit”
V
IN
= 3.0V/0.0V F = 100 MHz
V
OUT
= 2.0V/0.8V
The “point to point load circuit”
V
IN
= 2.4V/0.0V F = 100 MHz
V
OUT
= 1.7V/0.7V
2.5V
3.3V
See
Figure 5
See
Figure 7
See
Figure 7
See
Figure 7
Min.
Typ.
23
19
Max.
35
30
160
650
200
250
MHz
MHz
Unit
ps
ps
MHz
F
max(3.3V)
Maximum frequency
V
DD
= 3.3V
See
Figure 3
See
Figure 7
1
200
MHz
ns
See
Figure 3
1
AC Switching Characteristics
@ 3.3V, V
DD
= 3.3V ±5%, Temperature = –40°C to +85°C
Parameter
t
PLH
t
PHL
t
R
t
F
t
SK(0)
t
SK(p)
t
SK(t)
Propagation Delay – Low to High
Propagation Delay – High to Low
Output Rise Time
Output Fall Time
Output Skew: Skew between outputs of the same package (in phase) See
Figure 10
Pulse Skew: Skew between opposite transitions of the same output See
Figure 9
(t
PHL
– t
PLH
).
Package Skew: Skew between outputs of different packages at the See
Figure 11
same power supply voltage, temperature and package type.
Description
See
Figure 4
Min.
1.5
1.5
Typ.
2.7
2.7
0.8
0.8
0.25
0.38
0.2
0.42
Max. Unit
3.5
3.5
ns
ns
V/ns
V/ns
ns
ns
ns
Document #: 38-07056 Rev. *E
Page 3 of 9
CY2CC810
AC Switching Characteristics
@ 2.5V, V
DD
= 2.5V ±5%, Temperature = –40°C to +85°C
Parameter
t
PLH
t
PHL
t
R
t
F
t
SK(0)
t
SK(p)
t
SK(t)
Propagation Delay – Low to High
Propagation Delay – High to Low
Output Rise Time
Output Fall Time
Output Skew: Skew between outputs of the same package (in phase) See
Figure 10
Pulse Skew: Skew between opposite transitions of the same output See
Figure 9
(t
PHL
– t
PLH
).
Package Skew: Skew between outputs of different packages at the See
Figure 11
same power supply voltage, temperature and package type.
Description
See
Figure 4
Min.
1.5
1.5
Typ.
2.0
2.0
0.8
0.8
0.25
0.38
0.4
0.65
Max. Unit
3.5
3.5
ns
ns
V/ns
V/ns
ns
ns
ns
Parameter Measurement Information: V
DD
@ 2.5V
Figure 1. Load Circuit
[3,4,5]
f
F r o m O u tp u t
U nder T est
C
L
= 50 pF
500 ohm
Figure 2. Voltage Waveforms Pulse Duration
[6]
t
w(50-50)
Input
1.25 V
t
w(20-80)
Input
1.25 V
1.25 V
2.0 V
0V
2.0 V
0V
Figure 3. Point to Point Load Circuit
[3,4,5]
F ro m O u tp u t
U nder T est
C
L
= 3 pF
500 ohm
Notes
3. C
L
includes probe and jig capacitance.
4. All input pulses are supplied by generators having the following characteristics: PRR < 100 MHz, Z
0
= 50W, t
R
< 2.5 nS, t
F
< 2.5 nS.
5. The outputs are measured one at a time with one transition per measurement.
6. T
PLH
and T
PHL
are the same as t
pd
..
Document #: 38-07056 Rev. *E
Page 4 of 9
CY2CC810
Figure 4. Voltage WaveformsPropagation Delay Times
[4]
2.0 V
0V
t
PHL
1.25 V
V
OH
1.25 V
V
OL
Input
t
PLH
Output
1.25 V
1.25 V
Parameter Measurement Information: V
DD
@ 3.3V
Figure 5. Load Circuit
[3,4,5]
From Output
Under Test
C
L
= 50 pF
500 ohm
Figure 6. Voltage Waveforms–Pulse Duration
[6]
t
w(50-50)
Input
1.5V
t
w(20-80)
Input
1.5V
1.5V
2.7V
0V
2.7V
0V
Figure 7. Point to Point Load Circuit
[3,4,5]
From Output
Under Test
C
L
= 3 pF
500 ohm
Figure 8. Voltage Waveforms Propagation Delay Times
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