EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

SM99322C7A@12.500000MHZ

Description
CMOS Output Clock Oscillator, 12.5MHz Nom
CategoryPassive components    oscillator   
File Size170KB,2 Pages
ManufacturerMMD Monitor/Quartztek
Websitehttp://mmdcomp.com
Download Datasheet Parametric View All

SM99322C7A@12.500000MHZ Overview

CMOS Output Clock Oscillator, 12.5MHz Nom

SM99322C7A@12.500000MHZ Parametric

Parameter NameAttribute value
Reach Compliance Codeunknown
maximum descent time10 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
Manufacturer's serial numberSM993
Installation featuresSURFACE MOUNT
Nominal operating frequency12.5 MHz
Maximum operating temperature70 °C
Minimum operating temperature-10 °C
Oscillator typeCMOS
Output load30 pF
physical size7mm x 5mm x 1.6mm
longest rise time10 ns
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry60/40 %
Base Number Matches1
Problem calling EPwm1Regs.TBCTR value
[color=#555555][font="][size=14px]I would like to ask: When JU=EPwm1Regs.TBCTR;, why does the JU obtained always change between 100 and 101, instead of being equal to the value of EPwm1Regs.TBCTR chan...
lzx_18570633112 DSP and ARM Processors
[Rawpixel RVB2601 development board trial experience] 4. General hardware timer test
4. General Hardware Timer TestWhen using an operating system, if some tasks are performed in a software dead-wait manner, the system efficiency will inevitably be affected. Therefore, some slow period...
gs001588 XuanTie RISC-V Activity Zone
Ask a question about Verilog
I am a FPGA newbie, and now I have a Verilog question I would like to ask For example, there is an input data input [16:0] REG For ease of use, I now want to disassemble REG, such as a = REG[16:8]; b ...
littleshrimp FPGA/CPLD
Share MODBUS examples based on MSP430
This is the source code of the original author of tsg9456 in actual application, I hope it can help everyoneRun codeCopy code#include "synth.h"//-------------------------------------------------------...
火辣西米秀 Microcontroller MCU
Using FPGA to collect images and store them in SD card
I am currently working on using a camera to continuously capture several images in FPGA, storing the images in SDRAM, and want to store them in a SD card in bmp format. I don't know NIOS design, so I ...
微娴轩 EE_FPGA Learning Park
ATSAMD21, use ATMEL START to configure the internal DFLL48M CLOSE LOOP MODE to run at 48MHz
[b][color=#5E7384]This content is originally created by EEWORLD forum user [size=3]zhengwenbang[/size]. If you need to reprint or use it for commercial purposes, you must obtain the author's consent a...
zhengwenbang Microchip MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号