ISL6415 Device Information
ISL6415
Triple Output Regulator with Single Synchronous Buck and Dual LDO
Ordering Information
Part No.
ISL6415IR
ISL6415IR-T5K
ISL6415IR-TK
ISL6415IRZ
ISL6415IRZ-T5K
ISL6415IRZ-TK
ISL6415EVAL1
Status
Active
Active
Active
Active
Active
Active
Coming Soon
Temp.
Ind
Ind
Ind
Ind
Ind
Ind
Package
24 Ld QFN
24 Ld QFN T+R
24 Ld QFN T+R
24 Ld QFN
24 Ld QFN T+R
24 Ld QFN T+R
Printer Friendly Version
Price
MSL US $
1
1
1
2
2
2
2.15
2.15
2.15
The price listed is the manufacturer's suggested retail price for quantities between 100 and
999 units. However, prices in today's market are fluid and may change without notice.
MSL
= Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD
= Standard Microcircuit Drawing
Description
The ISL6415 is a highly integrated triple output regulator which provides a single chip solution for
wireless chipset power management. The device integrates high efficiency synchronous buck
regulator with two ultra low noise LDO regulators. The IC accepts an input voltage range of 3.0V to
3.6 V and provides three regulated output voltages: 1.2 V (PWM), 1.8 V (LDO1), and another ultra-
clean 1.8 V (LDO2).
The Synchronous current mode PWM regulator with integrated N- and P- channel power MOSFET
provides pre-set 1.2V for BBP/MAC core supply. Synchronous rectification with internal MOSFETs
is used to achieve higher efficiency and reduced number of external componenets. Operating
frequency is typically 750Khz allowing the use of smaller inductor and capacitor values. The device
can be synchronized to an external clock signal in the range of 500Khz to 1Mhz. The PG_PWM
output indicates loss of regulation on PWM output.
The ISL6415 also has two LDO regulators which use an internal PMOS transistor as the pass
device. LDO2 features ultra low noise that does not typically exceed 30 µV RMS to aid VCO
stability.The EN_LDO pin controls LDO1 and LDO2 outputs .The ISL6415 also integrates a RESET
function, which eliminates the need for additional RESET IC required in WLAN applications. The IC
asserts a RESET signal whenever the VIN supply voltage drops below a preset threshold, keeping
it asserted for at least 25msec after VIN has risen above the reset threshold. The PG_LDO output
indicates loss of regulation on either of the two LDO outputs. Other features include over current
protection for all three outputs and thermal shutdown.
High integration and the thin Quad Flat No-lead (QFN) package makes ISL6415 an ideal choice to
power many of today’s small form factor industry standard wireless cards such as PCMCIA, mini-
PCI and Cardbus-32.
Key Features
http://www.intersil.com/products/deviceinfo.asp?pn=ISL6415 (1 of 2)8/30/2004 12:18:46 PM
ISL6415 Device Information
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Fully Integrated Synchronous Buck Regulator + Dual LDO
High Output Current (For QFN package)
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PWM, 1.2V 400mA
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LDO1, 1.8V 300mA
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LDO2, 1.8V 200mA
Ultra-Compact DC-DC Converter Design
Stable with Small Ceramic Output Capacitors
High conversion efficiency
Low Shutdown supply current
Ultra-Low Dropout Voltage for LDOs
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LDO1, 1.8V 125mV (typ.) at 300mA
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LDO2, 1.8V 100mV (typ.) at 200mA
Ultra-Low Output Voltage Noise
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<30mVRMS (typ.) for LDO2 (VCO Supply)
PG_LDO, PG_PWM and PG_PWM outputs
Extensive circuit protection and monitoring features
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Over voltage protection
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Over current protection
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Shutdown
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Thermal Shutdown
Integrated RESET output for microprocessor reset
Proven Reference Design for Total WLAN System Solution
QFN Package
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Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat No Leads - Product Outline
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Near Chip-Scale Package Footprint Improves PCB Efficiency and Is Thinner in
Profile
Lead (Pb) - Free Packaging
Applications
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WLAN Cards
PCMCIA, Cardbus32, MiniPCI Cards
Compact Flash Cards
Liberty Chipset
Hand-Held Instruments
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http://www.intersil.com/products/deviceinfo.asp?pn=ISL6415 (2 of 2)8/30/2004 12:18:46 PM