GAL18V10-20LPIB datasheet, PDF

GAL18V10-20LPIB: DescriptionEE PLD, 20ns, CMOS, PDIP20, SKINNY, PLASTIC, DIP-20; CategoryProgrammable logic devices Programmable logic; File Size1MB，25 Pages; ManufacturerLattice; Websitehttp://www.latticesemi.com

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GAL18V10-20LPIB Overview

EE PLD, 20ns, CMOS, PDIP20, SKINNY, PLASTIC, DIP-20

Parameter Name	Attribute value
Parts packaging code	DIP
package instruction	DIP,
Contacts	20
Reach Compliance Code	unknown
ECCN code	EAR99
maximum clock frequency	41.6 MHz
JESD-30 code	R-PDIP-T20
Dedicated input times	7
Number of I/O lines	10
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	7 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Programmable logic type	EE PLD
propagation delay	20 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm
Base Number Matches	1

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