MT48LC8M16A2P-75L:G datasheet, PDF

Datasheet> All Categories > storage> storage> MT48LC8M16A2P-75L:G

MT48LC8M16A2P-75L:G: DescriptionSynchronous DRAM, 8MX16, 5.4ns, CMOS, PDSO54, 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-54; Categorystorage storage; File Size5MB，85 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

Download Datasheet Parametric View All

MT48LC8M16A2P-75L:G Overview

Synchronous DRAM, 8MX16, 5.4ns, CMOS, PDSO54, 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-54

MT48LC8M16A2P-75L:G Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Parts packaging code	TSOP2
package instruction	TSOP2, TSOP54,.46,32
Contacts	54
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	5.4 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	133 MHz
I/O type	COMMON
interleaved burst length	1,2,4,8
JESD-30 code	R-PDSO-G54
JESD-609 code	e3
length	22.22 mm
memory density	134217728 bit
Memory IC Type	SYNCHRONOUS DRAM
memory width	16
Number of functions	1
Number of ports	1
Number of terminals	54
word count	8388608 words
character code	8000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	8MX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Encapsulate equivalent code	TSOP54,.46,32
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Certification status	Not Qualified
refresh cycle	4096
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	1,2,4,8,FP
Maximum standby current	0.002 A
Maximum slew rate	0.31 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	10.16 mm
Base Number Matches	1

Preview

Download Datasheet

View All

128Mb: x4, x8, x16 Automotive SDRAM

Features

Automotive SDR SDRAM

MT48LC32M4A2 – 8 Meg x 4 x 4 Banks

MT48LC16M8A2 – 4 Meg x 8 x 4 Banks

MT48LC8M16A2 – 2 Meg x 16 x 4 Banks

Features

• PC100- and PC133-compliant

• Fully synchronous; all signals registered on positive

edge of system clock

• Internal, pipelined operation; column address can

be changed every clock cycle

• Internal banks for hiding row access/precharge

• Programmable burst lengths (BL): 1, 2, 4, 8, or full

page

• Auto precharge, includes concurrent auto precharge

and auto refresh modes

• Auto refresh mode; standard and low power

– 64ms, 4096-cycle (industrial)

– 16ms, 4096-cycle refresh (automotive)

• LVTTL-compatible inputs and outputs

• Single 3.3V ±0.3V power supply

• AEC-Q100

• PPAP submission

• 8D response time

Options

•

Options

• Configurations

– 32 Meg x 4 (8 Meg x 4 x 4 banks)

– 16 Meg x 8 (4 Meg x 8 x 4 banks)

– 8 Meg x 16 (2 Meg x 16 x 4 banks)

• Write recovery (

WR)

Table 1: Key Timing Parameters

CL = CAS (READ) latency

Speed Grade

-6A

-75

-7E

Clock

Frequency (MHz)

167

133

Marking

32M4

16M8

8M16

–

WR = 2 CLK

Plastic package – OCPL

– 54-pin TSOP II (400 mil)

– 54-pin TSOP II (400 mil) Pb-free

– 60-ball FBGA (8mm x 16mm)

– 60-ball FBGA (8mm x 16mm) Pb-free

– 54-ball VFBGA (x16 only) (8mm x

8mm)

– 54-ball VFBGA (x16 only) (8mm x

8mm) Pb-free

Timing – cycle time

– 7.5ns @ CL = 3 (PC133)

– 7.5ns @ CL = 2 (PC133)

– 6.0ns @ CL = 3 (x16 only)

Self refresh

– Standard

– Low power

Revision

Operating temperature range

– Industrial (–40˚C to +85˚C)

– Automotive (–40˚C to +105˚C)

1. Contact Micron for availability.

2. Off-center parting line.

3. Only available on Revision G.

Marking

-75

-7E

-6A

None

:G/:L

AIT

AAT

Notes:

Target

RCD-

RP-CL

3-3-3

2-2-2

RCD

(ns)

CL (ns)

PDF: 09005aef84baf515

128mb_x4x8x16_ait-aat_sdram.pdf - Rev. B 11/13 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

128Mb: x4, x8, x16 Automotive SDRAM

Features

Contents

General Description ......................................................................................................................................... 7

Automotive Temperature .............................................................................................................................. 7

Functional Block Diagrams ............................................................................................................................... 8

Pin and Ball Assignments and Descriptions ..................................................................................................... 11

Package Dimensions ....................................................................................................................................... 15

Temperature and Thermal Impedance ............................................................................................................ 18

Electrical Specifications .................................................................................................................................. 22

Electrical Specifications – I

Parameters ........................................................................................................ 24

Electrical Specifications – AC Operating Conditions ......................................................................................... 26

Functional Description ................................................................................................................................... 29

Commands .................................................................................................................................................... 30

COMMAND INHIBIT .................................................................................................................................. 30

NO OPERATION (NOP) ............................................................................................................................... 31

LOAD MODE REGISTER (LMR) ................................................................................................................... 31

ACTIVE ...................................................................................................................................................... 31

READ ......................................................................................................................................................... 32

WRITE ....................................................................................................................................................... 33

PRECHARGE .............................................................................................................................................. 34

BURST TERMINATE ................................................................................................................................... 34

Truth Tables ................................................................................................................................................... 35

Initialization .................................................................................................................................................. 40

Mode Register ................................................................................................................................................ 42

Burst Length .............................................................................................................................................. 44

Burst Type .................................................................................................................................................. 44

CAS Latency ............................................................................................................................................... 46

Operating Mode ......................................................................................................................................... 46

Write Burst Mode ....................................................................................................................................... 46

Bank/Row Activation ...................................................................................................................................... 47

READ Operation ............................................................................................................................................. 48

WRITE Operation ........................................................................................................................................... 57

Burst Read/Single Write .............................................................................................................................. 64

PRECHARGE Operation .................................................................................................................................. 65

Auto Precharge ........................................................................................................................................... 65

AUTO REFRESH Operation ............................................................................................................................. 77

SELF REFRESH Operation ............................................................................................................................... 79

Power-Down .................................................................................................................................................. 81

Clock Suspend ............................................................................................................................................... 82

Revision History ............................................................................................................................................. 85

Rev. B – 11/13 ............................................................................................................................................. 85

Rev. A – 4/12 ............................................................................................................................................... 85

PDF: 09005aef84baf515

128mb_x4x8x16_ait-aat_sdram.pdf - Rev. B 11/13 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

128Mb: x4, x8, x16 Automotive SDRAM

Features

List of Figures

Figure 1: 32 Meg x 4 Functional Block Diagram ................................................................................................. 8

Figure 2: 16 Meg x 8 Functional Block Diagram ................................................................................................. 9

Figure 3: 8 Meg x 16 Functional Block Diagram ............................................................................................... 10

Figure 4: 54-Pin TSOP (Top View) .................................................................................................................. 11

Figure 5: 60-Ball FBGA (TopView) .................................................................................................................. 12

Figure 6: 54-Ball VFBGA (Top View) ............................................................................................................... 13

Figure 7: 54-Pin Plastic TSOP (400 mil) ........................................................................................................... 15

Figure 8: 60-Ball TFBGA (x8 Device), 8mm x 16mm – Package Code FB/BB ...................................................... 16

Figure 9: 54-Ball VFBGA (x16 Device), 8mm x 8mm – Package Code F4/B4 ....................................................... 17

Figure 10: Example: Temperature Test Point Location, 54-Pin TSOP (Top View) ............................................... 20

Figure 11: Example: Temperature Test Point Location, 54-Ball VFBGA (Top View) ............................................ 21

Figure 12: Example: Temperature Test Point Location, 60-Ball FBGA (Top View) .............................................. 21

Figure 13: ACTIVE Command ........................................................................................................................ 31

Figure 14: READ Command ........................................................................................................................... 32

Figure 15: WRITE Command ......................................................................................................................... 33

Figure 16: PRECHARGE Command ................................................................................................................ 34

Figure 17: Initialize and Load Mode Register .................................................................................................. 41

Figure 18: Mode Register Definition ............................................................................................................... 43

Figure 19: CAS Latency .................................................................................................................................. 46

Figure 20: Example: Meeting

RCD (MIN) When 2 <

RCD (MIN)/

CK < 3 .......................................................... 47

Figure 21: Consecutive READ Bursts .............................................................................................................. 49

Figure 22: Random READ Accesses ................................................................................................................ 50

Figure 23: READ-to-WRITE ............................................................................................................................ 51

Figure 24: READ-to-WRITE With Extra Clock Cycle ......................................................................................... 52

Figure 25: READ-to-PRECHARGE .................................................................................................................. 52

Figure 26: Terminating a READ Burst ............................................................................................................. 53

Figure 27: Alternating Bank Read Accesses ..................................................................................................... 54

Figure 28: READ Continuous Page Burst ......................................................................................................... 55

Figure 29: READ – DQM Operation ................................................................................................................ 56

Figure 30: WRITE Burst ................................................................................................................................. 57

Figure 31: WRITE-to-WRITE .......................................................................................................................... 58

Figure 32: Random WRITE Cycles .................................................................................................................. 59

Figure 33: WRITE-to-READ ............................................................................................................................ 59

Figure 34: WRITE-to-PRECHARGE ................................................................................................................. 60

Figure 35: Terminating a WRITE Burst ............................................................................................................ 61

Figure 36: Alternating Bank Write Accesses ..................................................................................................... 62

Figure 37: WRITE – Continuous Page Burst ..................................................................................................... 63

Figure 38: WRITE – DQM Operation ............................................................................................................... 64

Figure 39: READ With Auto Precharge Interrupted by a READ ......................................................................... 66

Figure 40: READ With Auto Precharge Interrupted by a WRITE ........................................................................ 67

Figure 41: READ With Auto Precharge ............................................................................................................ 68

Figure 42: READ Without Auto Precharge ....................................................................................................... 69

Figure 43: Single READ With Auto Precharge .................................................................................................. 70

Figure 44: Single READ Without Auto Precharge ............................................................................................. 71

Figure 45: WRITE With Auto Precharge Interrupted by a READ ........................................................................ 72

Figure 46: WRITE With Auto Precharge Interrupted by a WRITE ...................................................................... 72

Figure 47: WRITE With Auto Precharge ........................................................................................................... 73

Figure 48: WRITE Without Auto Precharge ..................................................................................................... 74

Figure 49: Single WRITE With Auto Precharge ................................................................................................. 75

Figure 50: Single WRITE Without Auto Precharge ............................................................................................ 76

PDF: 09005aef84baf515

128mb_x4x8x16_ait-aat_sdram.pdf - Rev. B 11/13 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Recommended Resources

DC voltage monitor circuit with high return coefficient

Yuhua YDNI-150, YDNI-200, YDNI-250, YDNI-300 oil-filled electric heater circuit diagram

Wanbao YBR4-6, YBR4-6A hot and cold water dispenser circuit diagram 2 (improved type)

Vibration sensor recoding circuit

A two-button touch switch cleverly made using music chips

Electric blanket thermostat circuit

【AT-START-F403A Evaluation】+ Icon-based Application System Design (and Final Report): [i=s]This post was last edited by jinglixixi on 2020-10-26 14:14[/i]The AT32F403A development board is a powerful development board. A good design is to maximize its potential. To this end, the design...; jinglixixi Domestic Chip Exchange

In KEIL5, what is the difference between using J-LINK to download programs and debugging after downloading the programs? How do I know where the programs are downloaded to?: In KEIL5, what is the difference between using J-LINK to download the program and debugging after downloading the program? How do I know whether it is downloaded to FLASH or to RAM for debugging?...; 深圳小花 MCU

8-bit full-color LED module with built-in ws2811: Please ask the master: How to delay 0.5us? Use time.sleep(0.0000005)? Decimals cannot be used in time.sleep_us() In C language, I see that others use __nop(), but there is no such function in Micropyt...; lemon1394 MicroPython Open Source section

[Help] What kind of software is this that can implement this host computer monitoring system?: How is this upper computer software made? Can anyone tell me what software is used to make it? It would be best if you could provide a software download link. How was this brother monitoring module de...; jasonZC GD32 MCU

Use TPS65994AD and TUSB1044 to Achieve USB3.1 Gen2+DP1.4 at Type-C Port: USB Type-C is becoming more and more popular and is widely used in notebooks, mobile phones, desktops and industrial PCs. In these applications, the Type-C interface is often required to support both ...; qwqwqw2088 Analogue and Mixed Signal

How to make the CLK of tms320c6678 SPI output 8 clock cycles each time: 6678 reads and writes EEPROM through SPI interface. EEPROM needs to be write-enabled before writing. Write-enabled requires writing instruction 0x06 first, and requires CS to be pulled high after the ...; limingtai DSP and ARM Processors

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components