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MC54HC02AJ

Description
QUAD 2-INPUT NOR GATE HIGH-PERFORMANCE SILICON-GATE CMOS
Categorylogic    logic   
File Size96KB,7 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
Download Datasheet Parametric Compare View All

MC54HC02AJ Overview

QUAD 2-INPUT NOR GATE HIGH-PERFORMANCE SILICON-GATE CMOS

MC54HC02AJ Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMotorola ( NXP )
package instructionDIP,
Reach Compliance Codeunknow
seriesHC/UH
JESD-30 codeR-GDIP-T14
JESD-609 codee0
length19.495 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNOR GATE
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)22 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input NOR Gate
High–Performance Silicon–Gate CMOS
The MC54/74HC02A is identical in pinout to the LS02. The device inputs
are compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
µA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 40 FETs or 10 Equivalent Gates
MC54/74HC02A
J SUFFIX
CERAMIC PACKAGE
CASE 632–08
1
14
14
1
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
14
1
D SUFFIX
SOIC PACKAGE
CASE 751A–03
LOGIC DIAGRAM
A1
B1
A2
B2
A3
B3
A4
B4
2
1
3
5
4
6
8
10
9
11
13
12
PIN 14 = VCC
PIN 7 = GND
Y4
Y3
Y2
Y=A+B
Y1
14
1
DT SUFFIX
TSSOP PACKAGE
CASE 948G–01
ORDERING INFORMATION
MC54HCXXAJ
MC74HCXXAN
MC74HCXXAD
MC74HCXXADT
Ceramic
Plastic
SOIC
TSSOP
PIN ASSIGNMENT
Y1
A1
B1
Y2
A2
B2
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
Y4
B4
A4
Y3
B3
A3
FUNCTION TABLE
Inputs
A
L
L
H
H
B
L
H
L
H
Output
Y
H
L
L
L
10/95
©
Motorola, Inc. 1995
3–1
REV 7

MC54HC02AJ Related Products

MC54HC02AJ MC74HC02AN MC74HC02ADT MC74HC02AD MC74HC02A MC54HC02A
Description QUAD 2-INPUT NOR GATE HIGH-PERFORMANCE SILICON-GATE CMOS QUAD 2-INPUT NOR GATE HIGH-PERFORMANCE SILICON-GATE CMOS QUAD 2-INPUT NOR GATE HIGH-PERFORMANCE SILICON-GATE CMOS QUAD 2-INPUT NOR GATE HIGH-PERFORMANCE SILICON-GATE CMOS QUAD 2-INPUT NOR GATE HIGH-PERFORMANCE SILICON-GATE CMOS QUAD 2-INPUT NOR GATE HIGH-PERFORMANCE SILICON-GATE CMOS
Maker Motorola ( NXP ) Motorola ( NXP ) Motorola ( NXP ) Motorola ( NXP ) - -
package instruction DIP, DIP, DIP14,.3 PLASTIC, TSSOP-14 SOP, SOP14,.25 - -
Reach Compliance Code unknow unknow unknow unknown - -
series HC/UH HC/UH HC/UH HC/UH - -
JESD-30 code R-GDIP-T14 R-PDIP-T14 R-PDSO-G14 R-PDSO-G14 - -
JESD-609 code e0 e0 e0 e0 - -
length 19.495 mm 18.86 mm 5 mm 8.65 mm - -
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF - -
Logic integrated circuit type NOR GATE NOR GATE NOR GATE NOR GATE - -
Number of functions 4 4 4 4 - -
Number of entries 2 2 2 2 - -
Number of terminals 14 14 14 14 - -
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C - -
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C - -
Package body material CERAMIC, GLASS-SEALED PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - -
encapsulated code DIP DIP TSSOP SOP - -
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR - -
Package form IN-LINE IN-LINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE - -
propagation delay (tpd) 22 ns 22 ns 22 ns 22 ns - -
Certification status Not Qualified Not Qualified Not Qualified Not Qualified - -
Maximum seat height 5.08 mm 4.69 mm 1.2 mm 1.75 mm - -
Maximum supply voltage (Vsup) 6 V 6 V 6 V 6 V - -
Minimum supply voltage (Vsup) 2 V 2 V 2 V 2 V - -
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V - -
surface mount NO NO YES YES - -
technology CMOS CMOS CMOS CMOS - -
Temperature level MILITARY MILITARY MILITARY MILITARY - -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - -
Terminal form THROUGH-HOLE THROUGH-HOLE GULL WING GULL WING - -
Terminal pitch 2.54 mm 2.54 mm 0.65 mm 1.27 mm - -
Terminal location DUAL DUAL DUAL DUAL - -
width 7.62 mm 7.62 mm 4.4 mm 3.9 mm - -

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