NanoAmp Solutions, Inc.
670 North McCarthy Blvd. Suite 220, Milpitas, CA 95035
ph: 408-935-7777, FAX: 408-935-7770
www.nanoamp.com
N04L1618C2A
4Mb Ultra-Low Power Asynchronous CMOS SRAM
256Kx16 bit
Overview
The N04L1618C2A is an integrated memory
device containing a 4 Mbit Static Random Access
Memory organized as 262,144 words by 16 bits.
The device is designed and fabricated using
NanoAmp’s advanced CMOS technology to
provide both high-speed performance and ultra-low
power. The base design is the same as
NanoAmp’s N04L163WC1A, which is processed to
operate at higher voltages. The device operates
with two chip enable (CE1 and CE2) controls and
output enable (OE) to allow for easy memory
expansion. Byte controls (UB and LB) allow the
upper and lower bytes to be accessed
independently and can also be used to deselect
the device. The N04L1618C2A is optimal for
various applications where low-power is critical
such as battery backup and hand-held devices.
The device can operate over a very wide
temperature range of -40
o
C to +85
o
C and is
available in JEDEC standard packages compatible
with other standard 256Kb x 16 SRAMs
Features
• Single Wide Power Supply Range
1.65 to 2.2 Volts
• Very low standby current
0.5µA at 1.8V (Typical)
• Very low operating current
0.7mA at 1.8V and 1µs (Typical)
• Low Page Mode operating current
0.5mA at 1.8V and 1µs (Typical)
• Simple memory control
Dual Chip Enables (CE1 and CE2)
Byte control for independent byte operation
Output Enable (OE) for memory expansion
• Low voltage data retention
Vcc = 1.2V
• Very fast output enable access time
25ns OE access time
• Automatic power down to standby mode
• TTL compatible three-state output driver
• Compact space saving BGA package avail-
able
Product Family
Part Number
Package Type
Operating
Temperature
Power
Supply (Vcc)
Speed
70ns @ 1.8V
-40
o
C to +85
o
C
1.65V - 2.2V
85ns @ 1.65V
0.5
µA
0.7 mA @
1MHz
Standby
Operating
Current (I
SB
), Current (Icc),
Typical
Typical
N04L1618C2AB
48 - BGA
N04L1618C2AB2 48-BGA Green
(DOC# 14-02-016 REV G ECN# 01-1266)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
1
NanoAmp Solutions, Inc.
Pin Configuration
1
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
V
SS
V
CC
N04L1618C2A
2
OE
UB
I/O
10
I/O
11
I/O
12
3
A
0
A
3
A
5
A
17
NC
A
14
A
12
A
9
4
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
5
A
2
CE1
I/O
1
I/O
3
I/O
4
I/O
5
WE
A
11
6
CE2
I/O
0
I/O
2
V
CC
V
SS
I/O
6
I/O
7
NC
I/O
14
I/O
13
I/O
15
NC
NC
A
8
48 Pin BGA (top)
6 x 8 mm
Pin Descriptions
Pin Name
A
0
-A
17
WE
CE1, CE2
OE
LB
UB
I/O
0
-I/O
15
V
CC
V
SS
NC
Pin Function
Address Inputs
Write Enable Input
Chip Enable Input
Output Enable Input
Lower Byte Enable Input
Upper Byte Enable Input
Data Inputs/Outputs
Power
Ground
Not Connected
(DOC# 14-02-016 REV G ECN# 01-1266)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
NanoAmp Solutions, Inc.
Functional Block Diagram
Address
Inputs
A0 - A3
Word
Address
Decode
Logic
N04L1618C2A
Address
Inputs
A4 - A17
Page
Address
Decode
Logic
16K Page
x 16 word
x 16 bit
RAM Array
Input/
Output
Mux
and
Buffers
Word Mux
I/O0 - I/O7
I/O8 - I/O15
CE1
CE2
WE
OE
UB
LB
Control
Logic
Functional Description
CE1
H
X
X
L
L
L
CE2
X
L
X
H
H
H
WE
X
X
X
L
H
H
OE
X
X
X
X
3
L
H
UB
X
X
H
L
1
L
1
L
1
LB
X
X
H
L
1
L
1
L
1
I/O
0
- I/O
151
High Z
High Z
High Z
Data In
Data Out
High Z
MODE
Standby
2
Standby
2
Standby
2
Write
3
Read
Active
POWER
Standby
Standby
Standby
Active -> Standby
4
Active -> Standby
4
Standby
4
1. When UB and LB are in select mode (low), I/O
0
- I/O
15
are affected as shown. When LB only is in the select mode only I/O
0
- I/O
7
are affected as shown. When UB is in the select mode only I/O
8
- I/O
15
are affected as shown.
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally
isolated from any external influence and disabled from exerting any influence externally.
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
4. The device will consume active power in this mode whenever addresses are changed. Data inputs are internally isolated from
any expernal influence.
Capacitance
1
Item
Input Capacitance
I/O Capacitance
Symbol
C
IN
C
I/O
Test Condition
V
IN
= 0V, f = 1 MHz, T
A
= 25
o
C
V
IN
= 0V, f = 1 MHz, T
A
= 25
o
C
Min
Max
8
8
Unit
pF
pF
1. These parameters are verified in device characterization and are not 100% tested
(DOC# 14-02-016 REV G ECN# 01-1266)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
NanoAmp Solutions, Inc.
Absolute Maximum Ratings
1
Item
Voltage on any pin relative to V
SS
Voltage on V
CC
Supply Relative to V
SS
Power Dissipation
Storage Temperature
Operating Temperature
Soldering Temperature and Time
Symbol
V
IN,OUT
V
CC
P
D
T
STG
T
A
T
SOLDER
N04L1618C2A
Rating
–0.3 to V
CC
+0.3
–0.3 to 3.0
500
–40 to 125
-40 to +85
240
o
C, 10sec(Lead only)
Unit
V
V
mW
o
C
o
C
o
C
1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operating section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Operating Characteristics (Over Specified Temperature Range)
Item
Supply Voltage
Data Retention Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Input Leakage Current
Output Leakage Current
Read/Write Operating Supply Current
@ 1
µs
Cycle Time
2
Read/Write Operating Supply Current
@ 70 ns Cycle Time
2
Page Mode Operating Supply Current
@ 70ns Cycle Time
2
(Refer to Power
Savings with Page Mode Operation
diagram)
Read/Write Quiescent Operating Sup-
ply Current
3
Symbol
V
CC
V
DR
V
IH
V
IL
V
OH
V
OL
I
LI
I
LO
I
CC1
I
CC2
I
OH
= 0.2mA
I
OL
= -0.2mA
V
IN
= 0 to V
CC
OE = V
IH
or Chip Disabled
VCC=2.2V, V
IN
=V
IH
or V
IL
Chip Enabled, IOUT = 0
VCC=2.2V, V
IN
=V
IH
or V
IL
Chip Enabled, IOUT = 0
VCC=2.2V, V
IN
=V
IH
or V
IL
Chip Enabled, IOUT = 0
V
CC
=2.2V, V
IN
=V
IH
or V
IL
Chip Enabled, I
OUT
= 0,
f=0
V
IN
= V
CC
or 0V
Chip Disabled
t
A
= 85
o
C, V
CC
= 2.2V
V
CC
= 1.2V, V
IN
= V
CC
or 0
Chip Disabled, t
A
= 85
o
C
0.5
0.7
8.0
Chip Disabled
3
Test Conditions
Min.
1.65
1.2
0.7V
CC
–0.3
V
CC
–0.2
0.3
0.5
0.5
3.0
17.0
Typ
1
1.8
Max
2.2
2.2
V
CC
+0.3
0.3V
CC
Unit
V
V
V
V
V
V
µA
µA
mA
mA
I
CC3
4.0
mA
I
CC4
10
µA
Maximum Standby Current
3
I
SB1
10.0
µA
Maximum Data Retention
Current
3
I
DR
10
µA
1. Typical values are measured at Vcc=Vcc Typ., T
A
=25°C and not 100% tested.
2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive
output capacitance expected in the actual system.
3. This device assumes a standby mode if the chip is disabled (CE1 high or CE2 low). In order to achieve low standby current all
inputs must be within 0.2 volts of either V
CC
or V
SS
.
(DOC# 14-02-016 REV G ECN# 01-1266)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
NanoAmp Solutions, Inc.
Power Savings with Page Mode Operation (WE
=
V
IH
)
N04L1618C2A
Page Address (A4 - A17)
Open page
...
Word Address (A0 - A3)
Word 1
Word 2
Word 16
CE1
CE2
OE
LB, UB
Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal
organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power
saving feature.
The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open
and 16-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant
bits and addressing the 16 words within the open page, power is reduced to the page mode value which is
considerably lower than standard operating currents for low power SRAMs.
(DOC# 14-02-016 REV G ECN# 01-1266)
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.