High-Performance 1.8V/2.5V/3.3V Crystal
Input to LVCMOS Clock Fanout Buffer with OE
5P8390x
DATASHEET
Description
The 5P8390x is a high performance, 1-to-4/6/8 crystal input to
LVCMOS fanout buffer with output enable pins. This device
accepts a fundamental mode crystal from 10MHz to 40MHz
and outputs LVCMOS clocks with best-in-class phase noise
performance.
The 5P8390x family (5P83904, 5P83905, and 5P83908)
features a synchronous glitch-free Output Enable function to
eliminate any intermediate incorrect output clock cycles when
enabling or disabling outputs. It comes in standard TSSOP
packages or small QFN packages and can operate from 1.8V
to 3.3V supplies.
Features
•
4/6/8 copies of LVCMOS output clocks with best-in-class
•
phase noise performance
Phase Noise:
Offset Noise Power (3.3V)
•
100Hz: -131 dBc/Hz
•
1KHz: -145 dBc/Hz
•
10KHz: -154 dBc/Hz
•
100KHz: -161 dBc/Hz
Operating power supply modes:
•
Full 3.3V, 2.5V, 1.8V
•
Mixed 3.3V core/2.5V output operating supply
•
Mixed 3.3V core/1.8V output operating supply
•
Mixed 2.5V core/1.8V output operating supply
Crystal Oscillator Interface
Synchronous Output Enable
Packaged in 16-, 20-pin TSSOP and QFN packages (Pb
free, fully RoHS compliant)
Extended (-40°C to +105°C) temperature range
•
•
•
•
•
5P83904 Block Diagram
XTAL_IN
OSC
XTAL_OUT
ENABLE1
SYNC1
CLK3
ENABLE2
SYNC2
CLK0
CLK1
CLK2
5P8390x OCTOBER 5, 2016
1
©2016 Integrated Device Technology, Inc.
5P8390x DATASHEET
5P83905 Block Diagram
XTAL_IN
OSC
XTAL_OUT
CLK0
CLK1
CLK2
CLK3
CLK4
ENABLE1
SYNC1
CLK5
ENABLE2
SYNC2
5P83908 Block Diagram
XTAL_IN
OSC
XTAL_OUT
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
ENABLE1
SYNC1
CLK7
ENABLE2
SYNC2
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE
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OCTOBER 5, 2016
5P8390x DATASHEET
Pin Assignments for TSSOP Packages
XTAL_OUT 1
ENABLE2 2
GND
CLK0
VDDO
NC
GND
CLK1
3
4
5
6
7
8
5P83904PGGI
16 XTAL_IN
15 ENABLE1
14 CLK3
13 VDDO
12 CLK2
11 GND
10 NC
9 VDD
XTAL_OUT 1
VDD 2
ENABLE2
CLK0
GND
CLK1
VDDO
3
4
5
6
5P83908PGGI
20 XTAL_IN
19 GND
18 ENABLE1
17 CLK7
16 VDDO
15
14
13
12
11
CLK6
CLK5
GND
CLK4
VDD
XTAL_OUT 1
ENABLE2 2
GND
CLK0
VDDO
CLK1
GND
CLK2
3
4
5
6
7
8
5P83905PGGI
16 XTAL_IN
15 ENABLE1
14 CLK5
13 VDDO
12 CLK4
11 GND
10 CLK3
9 VDD
7
CLK2 8
GND 9
CLK3 10
Pin Assignments for QFN Packages
ENABLE1
XTAL_IN
ENABLE1
XTAL_IN
CLK3
VDDO
16 15 14 13
XTAL_OUT
ENABLE2
GND
CLK0
1
2
12
11
5P83904CMGI
10
3
9
4
5 6 7 8
VDDO
GND
CLK1
NC
CLK2
GND
NC
VDD
20 19 18 17 16
15 CLK6
XTAL_OUT 1
14 CLK5
VDD 2
ENABLE2 3
5P83908NDGI
13 GND
12 CLK4
CLK0 4
11 VDD
GND 5
6 7 8 9 10
CLK1
VDDO
CLK2
GND
CLK3
CLK4
GND
CLK3
VDD
ENABLE1
XTAL_IN
16 15 14 13
XTAL_OUT 1
ENABLE2 2
GND
CLK0
12
11
5P83905CMGI
10
3
9
4
5 6 7 8
VDDO
GND
CLK2
CLK1
OCTOBER 5, 2016
CLK5
VDDO
3
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE
GND
VDDO
CLK7
5P8390x DATASHEET
Pin Descriptions
Pin Name
XTAL_IN
XTAL_OUT
VDD
VDDO
GND
ENABLE1
ENABLE2
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
NC
Pin Number
5P83904
16
1
9
5, 13
3, 7, 11
15
2
4
8
12
14
—
—
—
—
6, 10
5P83905
16
1
9
5, 13
3, 7, 11
15
2
4
6
8
10
12
14
—
—
—
5P83908
20
1
2, 11
7, 16
5, 9, 13, 19
18
3
4
6
8
10
12
14
15
17
—
Pin Type
Input
Input
Power
Power
Power
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
NC
Pin Description
Oscillator Input from Crystal.
Oscillator Output to drive Crystal.
Positive power supply for core.
Positive power supply for outputs.
Power supply ground.
Output Enable pin. Please see below Output Enable
Function Table. Active High. Internal pull-up.
Output Enable pin. Please see below Output Enable
Function Table. Active High. Internal pull-up.
LVCMOS Clock Output 0. Voltage set by VDDO.
LVCMOS Clock Output 1. Voltage set by VDDO.
LVCMOS Clock Output 2. Voltage set by VDDO.
LVCMOS Clock Output 3. Voltage set by VDDO.
LVCMOS Clock Output 4. Voltage set by VDDO.
LVCMOS Clock Output 5. Voltage set by VDDO.
LVCMOS Clock Output 6. Voltage set by VDDO.
LVCMOS Clock Output 7. Voltage set by VDDO.
No connect.
Output Enable Function Table
ENABLE1
0
0
1
1(default)
ENABLE2
0
1
0
1(default)
5P83904 CLK0-2 5P83905 CLK0-4 5P83908 CLK0-6 5P83904 CLK3 5P83905 CLK5 5P83908 CLK7
Low
Low
Active
Active
Low
Low
Active
Active
Low
Low
Active
Active
Low
Active
Low
Active
Low
Active
Low
Active
Low
Active
Low
Active
HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE
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OCTOBER 5, 2016
5P8390x DATASHEET
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 5P8390x. These ratings, which are standard values
for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions
above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended
operating temperature range.
Item
Supply Voltage, VDD
Output Enable and All Outputs
CLKIN
Ambient Operating Temperature (extended)
Storage Temperature
Junction Temperature
Soldering Temperature
3.465V
-0.4 V to VDD+0.5 V
-0.4 V to 3.465V
-40 to +105°C
-65 to +150°C
125C
260C
Rating
Recommended Operation Conditions
Parameter
Ambient Operating Temperature (extended)
Power Supply Voltage (measured in respect to GND)
Min.
-40
+1.71
Typ.
Max.
+105
+3.465
Units
C
V
DC Electrical Characteristics
(VDD = 1.8V, 2.5V, 3.3V)
VDD=1.8V ±5%
, Ambient temperature -40° to +105°C, unless stated otherwise
Parameter
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Nominal Output Impedance
Operating Supply Current
5P83904
5P83905
5P83908
IDD
Outputs On, 25MHz with No Load
Outputs On, 25MHz with No Load
Outputs On, 25MHz with No Load
8.9
9.0
9.2
mA
Symbol
V
IH
V
IL
V
OH
V
OL
Z
O
Conditions
XTAL_IN, ENABLE1/2 pins
XTAL_IN, ENABLE1/2 pins
I
OH
= -4 mA
I
OL
= 4 mA
Min.
0.7xVDD
Typ.
Max.
0.3xVDD
Units
V
V
V
V
1.65
0.03
14
1.85
0.05
OCTOBER 5, 2016
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HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE