SN74ACT00DBRG4 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > logic> logic> SN74ACT00DBRG4

SN74ACT00DBRG4: DescriptionLogic Gates Quad 2Input Pos-NAND; Categorylogic logic; File Size633KB，17 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

Stay tuned Parametric Compare

SN74ACT00DBRG4 Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	SN74ACT00DBRG4	-	-	View	Buy Now

SN74ACT00DBRG4 Overview

Logic Gates Quad 2Input Pos-NAND

SN74ACT00DBRG4 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	SSOP
package instruction	SSOP, SSOP14,.3
Contacts	14
Reach Compliance Code	unknow
series	ACT
JESD-30 code	R-PDSO-G14
JESD-609 code	e4
length	6.2 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.024 A
Humidity sensitivity level	1
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Encapsulate equivalent code	SSOP14,.3
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Prop。Delay @ Nom-Su	9.5 ns
propagation delay (tpd)	9.5 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	2 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	5.3 mm

SN74ACT00DBRG4 Related Products

	SN74ACT00DBRG4	SN74ACT00PWRG4	SN74ACT00PWE4	SN74ACT00PWRE4	SN74ACT00NSRG4	SN74ACT00NSRE4	SN74ACT00PWG4	SN74ACT00DE4	SN74ACT00DBRE4
Description	Logic Gates Quad 2Input Pos-NAND	Quadruple 2-Input Positive-NAND Gates 14-TSSOP -40 to 85	Logic Gates Quadruple 2-Input Positive-NAND gates	Logic Gates Quadruple 2-Input Positive-NAND gates	Logic Gates Quad 2Input Pos-NAND	Logic Gates Quadruple 2-Input Positive-NAND gates	Logic Gates Quad 2Input Pos-NAND	Logic Gates Quadruple 2-Input Positive-NAND gates	Logic Gates Quadruple 2-Input Positive-NAND gates
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Maker	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
Parts packaging code	SSOP	TSSOP	TSSOP	TSSOP	SOIC	SOIC	TSSOP	SOIC	SSOP
package instruction	SSOP, SSOP14,.3	TSSOP, TSSOP14,.25	TSSOP, TSSOP14,.25	TSSOP, TSSOP14,.25	SOP, SOP14,.3	SOP, SOP14,.3	TSSOP, TSSOP14,.25	SOP, SOP14,.25	SSOP, SSOP14,.3
Contacts	14	14	14	14	14	14	14	14	14
Reach Compliance Code	unknow	compli	unknow	unknow	unknow	unknow	unknow	unknow	unknow
series	ACT	ACT	ACT	ACT	ACT	ACT	ACT	ACT	ACT
JESD-30 code	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14
JESD-609 code	e4	e4	e4	e4	e4	e4	e4	e4	e4
length	6.2 mm	5 mm	5 mm	5 mm	10.2 mm	10.2 mm	5 mm	8.65 mm	6.2 mm
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE
MaximumI(ol)	0.024 A	0.024 A	0.024 A	0.024 A	0.024 A	0.024 A	0.024 A	0.024 A	0.024 A
Humidity sensitivity level	1	1	1	1	1	1	1	1	1
Number of functions	4	4	4	4	4	4	4	4	4
Number of entries	2	2	2	2	2	2	2	2	2
Number of terminals	14	14	14	14	14	14	14	14	14
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	TSSOP	TSSOP	TSSOP	SOP	SOP	TSSOP	SOP	SSOP
Encapsulate equivalent code	SSOP14,.3	TSSOP14,.25	TSSOP14,.25	TSSOP14,.25	SOP14,.3	SOP14,.3	TSSOP14,.25	SOP14,.25	SSOP14,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260	260	260	260
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
Prop。Delay @ Nom-Su	9.5 ns	9.5 ns	9.5 ns	9.5 ns	9.5 ns	9.5 ns	9.5 ns	9.5 ns	9.5 ns
propagation delay (tpd)	9.5 ns	9.5 ns	9.5 ns	9.5 ns	9.5 ns	9.5 ns	9.5 ns	9.5 ns	9.5 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Schmitt trigger	NO	NO	NO	NO	NO	NO	NO	NO	NO
Maximum seat height	2 mm	1.2 mm	1.2 mm	1.2 mm	2 mm	2 mm	1.2 mm	1.75 mm	2 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	0.65 mm	0.65 mm	1.27 mm	1.27 mm	0.65 mm	1.27 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	5.3 mm	4.4 mm	4.4 mm	4.4 mm	5.3 mm	5.3 mm	4.4 mm	3.9 mm	5.3 mm
Is it lead-free?	Lead free	-	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free
method of packing	TAPE AND REEL	TAPE AND REEL	-	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL	TUBE	TUBE	TAPE AND REEL

Recommended Resources

Audio AGC circuit using FET

Voice activated recording and communication shutdown device

electronic fireworks

555 dual-tone electronic doorbell circuit (1)

High precision triangle wave oscillator

845E computer motherboard circuit diagram_28

This electronic clock program question: This electronic clock program question...; QWE4562009 51mcu

EEWORLD University ---- Live Replay: Security Series 20 - Configuring MPU Security in Your Factory: Live Replay: Safety Series 20 - Configuring MPU Safety in Your Factory : https://training.eeworld.com.cn/course/67780...; hi5 Integrated technical exchanges

Vicor white paper download - Bidirectional power: The driving force behind the "quiet" change in the world: [size=4][b]Event details >> [/b][/size][url=https://www.eeworld.com.cn/huodong/Vicor_20181112/index.html][size=4][color=blue][b]Vicor White Paper Download - Bidirectional Power: The "Quiet" Driving Fo...; EEWORLD社区 Power technology

[HC32F460 Development Board Review] 05. Recognition and processing of matrix buttons: The HC32F460 chip is equipped with a keyboard control module (KEYSCAN) that supports row and column scans of the matrix keyboard; the columns are driven by independent outputs KEYOUTm (m=0~7), while t...; xld0932 Domestic Chip Exchange

How to calculate the cost of surveillance installation and cleaning work: How to calculate the cost of surveillance installation and cleaning work...; qq102100 Security Electronics

100 Practical Tips for FPGA Design Experts: FPGA logic design has become a highly specialized hardware design field, which requires designers to master design tools, have a deep understanding of the internal structure of FPGAs, and flexibly use...; arui1999 Download Centre

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components