Active Delay Line, 1-Func, 5-Tap, True Output, CMOS, DIP-14/8
Parameter Name | Attribute value |
Maker | SIXNET |
Parts packaging code | DIP |
package instruction | DIP, |
Contacts | 14 |
Reach Compliance Code | unknown |
Is Samacsys | N |
JESD-30 code | R-XDIP-T8 |
length | 20.32 mm |
Logic integrated circuit type | ACTIVE DELAY LINE |
Number of functions | 1 |
Number of taps/steps | 5 |
Number of terminals | 8 |
Maximum operating temperature | 85 °C |
Minimum operating temperature | -40 °C |
Output polarity | TRUE |
Package body material | UNSPECIFIED |
encapsulated code | DIP |
Package shape | RECTANGULAR |
Package form | IN-LINE |
programmable delay line | NO |
Certification status | Not Qualified |
Maximum seat height | 6.99 mm |
Maximum supply voltage (Vsup) | 5.25 V |
Minimum supply voltage (Vsup) | 4.75 V |
Nominal supply voltage (Vsup) | 5 V |
surface mount | NO |
technology | CMOS |
Temperature level | INDUSTRIAL |
Terminal form | THROUGH-HOLE |
Terminal pitch | 2.54 mm |
Terminal location | DUAL |
Total delay nominal (td) | 350 ns |
width | 7.62 mm |
Base Number Matches | 1 |