EPC2050 – Enhancement-Mode Power Transistor
Preliminary Specification Sheet
Status: Engineering
Features:
•
V
DS
, 350 V
•
Maximum R
DS(on)
, 65
mΩ
•
I
D
, 6.3 A
Applications:
•
Multi-Level AC-DC Conversion
•
EV Charging
•
Solar Power Inverters
•
Motor Drives
•
Wireless Power Class-E Amplifiers
•
LED Lighting
•
Medical Imaging
Maximum Ratings
V
DS
I
D
V
GS
T
J
T
STG
Drain-to-Source Voltage (Continuous)
Continuous (T
A
= 25˚C, R
θJA
= 26
˚C/W)
Pulsed (25˚C, T
PULSE
= 300 µs)
Gate-to-Source Voltage
Gate-to-Source Voltage
Operating Temperature
Storage Temperature
350
6.3
26
6
-4
-40 to 150
-40 to 150
V
A
V
˚C
EPC2050 eGaN® FETs are supplied in
passivated die form with solder bumps.
Die Size: 1.95 mm x 1.95 mm
Static Characteristics
(T
J
= 25˚C unless otherwise stated)
PARAMETER
BV
DSS
I
DSS
I
GSS
V
GS(TH)
R
DS(on)
V
SD
Drain-to-Source Voltage
Drain Source Leakage
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Threshold Voltage
Drain-Source On Resistance
Source-Drain Forward Voltage
TEST CONDITIONS
V
GS
= 0 V, I
D
= 120 µA
V
DS
= 280 V, V
GS
= 0 V
V
GS
= 5 V
V
GS
= -4 V
V
DS
= V
GS
, I
D
= 1.5 mA
V
GS
= 5 V, I
D
= 6 A
I
S
= 0.5 A, V
GS
= 0 V
Thermal Characteristics
TYP
R
θJC
R
θJB
R
θJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Board
Thermal Resistance, Junction to Ambient (Note 1)
1.4
9.2
64
UNIT
˚C/W
˚C/W
˚C/W
0.8
MIN
350
2
0.1
2
1.4
42
2.2
20
1
20
2.5
65
TYP
MAX
UNIT
V
µA
mA
µA
V
mΩ
V
All measurements were done with substrate shorted to source.
Note 1: R
θ
JA
is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board.
See
http://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf
for details.
Subject to Change without Notice
www.epc-co.com
COPYRIGHT 2018
Page 1
EPC2050 – Enhancement-Mode Power Transistor
Preliminary Specification Sheet
Dynamic Characteristics
(T
J
= 25˚C unless
otherwise stated)
PARAMETER
C
ISS
C
RSS
C
OSS
C
OSS(ER)
C
OSS(TR)
Q
G
Q
GS
Q
GD
Q
G(TH)
Q
OSS
Q
RR
Input Capacitance
Reverse Transfer Capacitance
Output Capacitance
Effective Output Capacitance,
Energy Related (note 2)
Effective Output Capacitance,
Time Related (note 3)
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge at Threshold
Output Charge
Source-Drain Recovery Charge
V
DS
= 280 V, V
GS
= 0 V
V
DS
= 280 V, I
D
= 6 A
V
DS
= 0 to 280 V, V
GS
= 0 V
V
DS
= 280 V, V
GS
= 0 V
TEST CONDITIONS
MIN
TYP
420
0.3
55
83
116
V
DS
= 280 V, V
GS
= 5 V, I
D
= 6 A
3.4
1.4
0.4
1
33
0
50
nC
4.3
83
pF
MAX
505
UNIT
Note 2: C
OSS(ER)
is a fixed capacitance that gives the same stored energy as C
OSS
while V
DS
is rising from 0 to 50% BV
DSS
.
Note 3: C
OSS(TR)
is a fixed capacitance that gives the same charging time as C
OSS
while V
DS
is rising from 0 to 50% BV
DS
.
All measurements were done with substrate shorted to source.
Figure 1: Typical Output Characteristics at 25°C
Figure 2: Transfer Characteristics
Subject to Change without Notice
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Page 2
EPC2050 – Enhancement-Mode Power Transistor
Preliminary Specification Sheet
Figure 3: R
DS(on)
vs V
GS
for Various Drain Currents
Figure 4: R
DS(on)
vs V
GS
for Various Temperatures
Figure 5a: Capacitance (Linear Scale)
Figure 5b: Capacitance (Log Scale)
Figure 5c: Output Charge and C
OSS
Stored Energy
Figure 6: Gate Charge
Subject to Change without Notice
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COPYRIGHT 2018
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EPC2050 – Enhancement-Mode Power Transistor
Preliminary Specification Sheet
Figure 7: Reverse Drain-Source Characteristics
Figure 8: Normalized On-State Resistance vs Temperature
Figure 9: Normalized Threshold Voltage vs Temperature
Figure 10: Safe Operating Area
Subject to Change without Notice
www.epc-co.com
COPYRIGHT 2018
Page 4
EPC2050 – Enhancement-Mode Power Transistor
Preliminary Specification Sheet
Figure 11a: Transient Thermal Response Curves (Junction-to-Case)
Notes:
Duty Factor: D = t
1
/t
2
Peak T
J
= P
DM
x Z
θJC
x R
θJC
+ T
C
Figure 11b: Transient Thermal Response Curves (Junction-to-Board)
Notes:
Duty Factor: D = t
1
/t
2
Peak T
J
= P
DM
x Z
θJB
x R
θJB
+ T
B
Subject to Change without Notice
www.epc-co.com
COPYRIGHT 2018
Page 5
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