Micrel, Inc.
3.3V ECL/PECL
2:8 DIFFERENTIAL FANOUT BUFFER
SY100E310L
SY100E310L
FEATURES
s
Guaranteed AC performance over temperature and
voltage:
• > 800MHz f
MAX
(typical)
• < 50ps within-device skew
s
Low voltage operation:
• LVPECL: +3.3V
±
10%
• LVECL: –3.3V
±
10%
s
Internal 75k
Ω
pull-down resistors
s
Guaranteed over industrial temperature range:
–40
°
C to +85
°
C
s
Pin-for-pin, plug-in replacement for MC100LVE310
s
Available in 28-pin PLCC package
DESCRIPTION
The SY100E310L is a 3.3V, precision 2:8 ECL/PECL
fanout buffer optimized for precision low-skew clock
distribution. The SY100E310L features fully differential clock
paths to minimize both device and system skew resulting in
skew performance of < 50ps. In addition, the device includes
a 2:1 multiplexer input for redundant switchover applications.
The SY100E310L is optimized for low voltage +3.3V
LVPECL or –3.3V LVECL applications.
Data sheets and support documentation can be found on
Micrel’s web site at www.micrel.com.
APPLICATIONS
s
Communications clock distribution
s
Redundant clock switchover
s
High-end server clock distribution
CROSS REFERENCE TABLE
Micrel Semiconductor
SY100E310LJI
SY100E310LJITR
On Semiconductor
MC100LVE310FN
MC100LVE310FNR2
FUNCTIONAL BLOCK DIAGRAM
Q0
/Q0
Q1
TYPICAL PERFORMANCE
Output Swing
vs. Frequency
900
800
Q AMPLITUDE (mV)
700
600
500
400
300
200
100
0
/Q1
Q2
/Q2
CLKA
/CLKA
CLKB
/CLKB
/Q4
SEL
Q5
/Q5
Q6
/Q6
Q7
V
BB
/Q7
Q3
/Q3
Q4
1000
1200
1400
CLK FREQUENCY (MHz)
M9999-072106
hbwhelp@micrel.com or (408) 955-1690
Rev.: D
1600
Amendment: /1
0
200
400
600
1
800
Issue Date: July 2006
Micrel, Inc.
SY100E310L
PACKAGE/ORDERING INFORMATION
CLKB
VBB
/CLKA
VCC
CLKA
CLK_SEL
VEE
Ordering Information
(1)
Part Number
Package
Type
J28-1
J28-1
J28-1
J28-1
Operating
Range
Industrial
Industrial
Industrial
Industrial
Package
Marking
SY100E310LJI
SY100E310LJI
SY100E310LJY with
Pb-Free bar-line indicator
SY100E310LJY with
Pb-Free bar-line indicator
Lead
Finish
Sn-Pb
Sn-Pb
Matte-Sn
Matte-Sn
4 3 2 1 28 27 26
/CLKB
NC
/Q7
VCCO
Q7
/Q6
Q6
5
6
7
8
9
10
11
12 13 14 15 16 17 18
25
24
23
22
21
20
19
Q0
/Q0
Q1
VCCO
/Q1
Q2
/Q2
SY100E310LJI
SY100E310LJITR
(2)
SY100E310LJY
(3)
SY100E310LJYTR
(2, 3)
Notes:
/Q5
Q5
/Q4
VCCO
Q4
/Q3
Q3
28-Pin PLCC (J28-1)
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
PIN DESCRIPTION
Pin Number
1
28, 2, 4, 5
3
6
8, 15, 22
24, 21, 19,
17, 14, 12, 10, 7
25, 23, 20, 18,
16, 13, 11, 9,
26
27
Pin Name
VCC
CLKA, /CLKA
CLKB, /CLKB
VBB
NC
VCCO
/Q0, /Q1, /Q2, /Q3
/Q4, /Q5, /Q6, /Q7
Q0, Q1, Q2, Q3
Q4, Q5, Q6, Q7
VEE
CLK_SEL
Pin Function
Positive Core Power Supply. Bypass with 0.1µF||0.01µF low ESR capacitors.
Not internally connected to V
CCO
. Must be externally connected to V
CCO
on PCB.
Differential Inputs: These input pairs are the differential data inputs to the device.
Reference Voltage Output. Used for AC-coupled inputs or single-ended inputs.
No Connect.
Positive Power Supply. Bypass with 0.1µF||0.01µF low ESR capacitors.
Not internally connected to V
CC
. Must be externally connected to V
CC
on PCB.
Differential Outputs.
Differential Outputs.
Negative Supply.
Single-Ended Clock Select.
M9999-072106
hbwhelp@micrel.com or (408) 955-1690
2
Micrel, Inc.
SY100E310L
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
) ................................. –0.5V to +4.0V
Input Voltage (V
IN
) ........................................ –0.5V to V
CC
Termination Current
(3)
Source or sink current on V
BB
(I
BB
) .....................
±0.5mA
Input Current
Source or sink current
(CLKA, /CLKA, CLKB, /CLKB, CLK_SEL) .........
±50mA
Lead Temperature (soldering, 20 sec.) ................... +260°C
Storage Temperature (T
S
) ...................... –65°C to +150°C
Operating Ratings
(2)
Supply Voltage (V
CC
) ................................. +3.0V to +3.6V
Ambient Temperature (T
A
) ........................ –40°C to +85°C
Package Thermal Resistance
PLCC
(θ
JA
)
Still-Air ......................................................... 63.5°C/W
500lfpm ........................................................ 43.5°C/W
DC ELECTRICAL CHARACTERISTICS
(4)
T
A
= –40°C to +85°C; unless noted.
Symbol
V
CC
Parameter
Power Supply
Condition
Min
3.0
Typ
3.3
Max
3.6
Units
V
LVPECL DC ELECTRICAL CHARACTERISTICS
(4, 5)
V
CC
= +3.3V, V
EE
= 0V; T
A
= –40°C to +85°C; unless noted.
Symbol
I
CC
V
OH
V
OL
V
IH
V
IL
V
IHCMR
Parameter
Power Supply Current
Output High Voltage
(Q0-Q7, /Q0-/Q7)
Output Low Voltage
(Q0-Q7, /Q0-/Q7)
Input High Voltage
(CLKA, /CLKA, CLKB, /CLKB, CLK_SEL)
Input Low Voltage
(CLKA, /CLKA, CLKB, /CLKB, CLK_SEL)
Input High Voltage Common
Mode Range (Differential)
(CLKA, / CLKA, CLKB, /CLKB)
Output Reference Voltage
Input HIGH Current
(CLKA, /CLKA, CLKB,/CLKB, CLK_SEL)
Input LOW Current
(CLKA, /CLKA, CLKB, /CLKB, CLK_SEL)
0.5
Note 6
Condition
No load, max. V
CC
R
L
= 50Ω to V
CC
–2V
R
L
= 50Ω to V
CC
–2V
2215
1470
2135
1490
1.8
Min
Typ
55
2345
1595
Max
70
2420
1680
2420
1825
2.9
Units
mA
mV
mV
mV
mV
V
V
BB
I
IN
I
IL
Notes:
1.92
2.04
150
V
µA
µA
1. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to Absolute Maximum Ratlng conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Due to the limited drive capability use for input of the same package only.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
5. Input and output parameters vary 1:1 with V
CC
. V
CC
can vary
±0.3V.
6. V
IHCMR
is defined as the range within which the V
IH
level may vary with the device still meeting the propagation delay specification. The V
IL
level
must be such that the peak-to-peak voltage is less than 1.0V and then greater than or equal to V
PP
(min).
M9999-072106
hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
SY100E310L
LVNECL DC ELECTRICAL CHARACTERISTICS
(7, 8)
V
CC
= +3.3V, V
EE
= 0V; T
A
= –40°C to +85°C; unless noted.
Symbol
V
OH
V
OL
V
IH
V
IL
V
IHCMR
Parameter
Output High Voltage
(Q0-Q7, /Q0-/Q7)
Output Low Voltage
(Q0-Q7, /Q0-/Q7)
Input High Voltage
(CLKA, /CLKA, CLKB, /CLKB, CLK_SEL)
Input Low Voltage
(CLKA, /CLKA, CLKB, /CLKB, CLK_SEL)
Input High Voltage Common
Mode Range (Differential)
(CLKA, / CLKA, CLKB, /CLKB)
Output Reference Voltage
Input HIGH Current
(CLKA, /CLKA, CLKB,/CLKB, CLK_SEL)
Input LOW Current
(CLKA, /CLKA, CLKB, /CLKB, CLK_SEL)
0.5
Note 9
Condition
R
L
= 50Ω to V
CC
–2V
R
L
= 50Ω to V
CC
–2V
Min
–1085
–1830
–1165
–1810
–1.5
Typ
–955
–1705
Max
–880
–1620
–880
–1475
–0.4
Units
mV
mV
mV
mV
V
V
BB
I
IN
I
IL
–1.38
–1.26
150
V
µA
µA
AC ELECTRICAL CHARACTERISTICS
V
CC
= +3.0 to +3.6V and V
EE
= 0V or V
CC
= 0V and V
EE
= –3.0 to –3.6V; T
A
= –40°C to +85°C; unless noted.
Symbol
f
MAX
t
PD
Parameter
Maximum Operating Frequency
Propagation Delay
CLKA-to-Q, CLKB-to-Q (Differential)
CLKA-to-Q, CLKB-to-Q (Single-ended)
t
SKEW
t
JITTER
V
PP
t
r
, t
f
Notes:
7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
8. Input and output parameters vary 1:1 with V
CC
. V
CC
can vary
±0.3V.
9. V
IHCMR
is defined as the range within which the V
IH
level may vary with the device still meeting the propagation delay specification. The V
IL
level
must be such that the peak-to-peak voltage is less than 1.0V and then greater than or equal to V
PP
(min).
10. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals.
11. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
12. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device.
13. V
PP
(min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The V
PP
(min) is AC limited for
the E310L as a differential input as low as 50 mV will still produce full ECL levels at the output.
Condition
V
OUT
= 400mV
Note 10
Note 11
Note 12
Min
Typ
800
Max
Units
MHz
525
500
725
750
50
200
1
ps
ps
ps
ps
ps
RMS
Within-Device Skew
Part-to-Part Skew (Differential)
Cycle-to-Cycle Jitter
Input Swing
Rise / Fall Time (20% to 80%)
(Q0-Q7, /Q0-/Q7)
Note 13
500
160
375
1000
600
mV
ps
M9999-072106
hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
SY100E310L
TYPICAL OPERATING CHARACTERISTICS
V
CC
= 3.3V, T
A
= 25°C
Output Swing
vs. Frequency
900
PROPAGATION DELAY (ps)
800
Q AMPLITUDE (mV)
700
600
500
400
300
200
100
1000
1200
1400
1600
0
200
400
600
800
0
700
675
650
625
600
575
550
525
Input to Q
Propagation Delay
vs. Temperature
SEL-Q
CLK-Q(S-E)
CLK-Q(Diff)
500
-50 -25
0
25 50 75 100
TEMPERATURE (°C) (Forced Air)
CLK FREQUENCY (MHz)
RELATED PRODUCT AND SUPPORT DOCUMENTATION
Part Number
HBW Solutions
Function
New Products and Applications
Data Sheet Link
www.micrel.com/product-info/products/solutions.shtml
M9999-072106
hbwhelp@micrel.com or (408) 955-1690
5
EE_FPGA Learning Park
京公网安备 11010802033920号
EEWORLD
