5-BIT REGISTERED
TRANSCEIVER
SY100S891
FEATURES
s
25
Ω
cut-off bus outputs
s
50
Ω
receiver outputs
s
Transmit and receive registers with separate clocks
s
1500ps max. delay from CLK
1
to Bus Outputs (BUS)
s
1500ps max. delay from CLK
2
to Receiver Outputs (Q)
s
Individual bus enable pins
s
Internal 75K
Ω
input pull-down resistors
s
Voltage and temperature compensation for improved
noise immunity
s
Industry standard 100K ECL levels
s
Extended supply voltage option:
V
EE
= –4.2V to –5.5V
s
Available in 28-pin PLCC package
DESCRIPTION
The SY100S891 is a 5-bit registered transceiver
containing five bus transceivers with both transmit and
receive registers. The bus outputs (BUS
0
– BUS
4
) are
specified for driving a 25 ohm bus and the receive outputs
(Q
0
– Q
4
) are specified for driving a 50 ohm line. The
bus outputs have a normal high level output voltage and
a normal low level output voltage when the bus enable
(BUSEN
0
– BUSEN
4
) is high. However, the output is
switched to a cut-off level when a bus-enable is low.
This cut-off level is sufficiently low that a relatively high
impedance is presented to the bus in order to minimize
reflections. There is one bus-enable for each bus driver;
a clock (CLK
1
) which is common to all five bus driver
registers; and a separate clock (CLK
2
) which is common
to all five receive registers. Data at the D inputs is clocked
to the Bus register by a positive transition of CLK
1
and
data on the bus is clocked into the Receiver register by
a positive transition of CLK
2
. A high on the Master Reset
clears all registers.
PIN CONFIGURATION
PIN NAMES
Pin
Function
Bus Enable Inputs
Data Inputs
Bus Driver Clock Input
Receive Register Clock
Master Reset
Bus Receive Outputs
Bus Outputs
BUSEN
3
D
4
BUSEN
4
BUSEN
0–4
BUS
4
V
CCA
Q
4
D
3
D
0
– D
4
CLK
1
CLK
2
18
17
25 24 23 22 21 20 19
MR
CLK
2
CLK
1
V
EE
D
2
BUSEN
2
D
1
26
27
28
1
2
3
4
5
6
7
8
9
10 11
Q
3
BUS
3
V
CC
Q
2
BUS
2
V
CCA
Q
1
MR
Q
0
– Q
4
BUS
0–4
TOP VIEW
PLCC
J28-1
16
15
14
13
12
BUSEN
1
D
0
BUSEN
0
Q
0
BUS
0
V
CCA
BUS
1
Rev.: E
Amendment: /0
1
Issue Date: August, 1998
Micrel
SY100S891
DC ELECTRICAL CHARACTERISTICS
V
EE
= –4.2V to –5.5V unless otherwise specified; V
CC
= V
CCA
= GND
Symbol
V
CUT
V
OH
V
OL
V
OHA
V
OLA
V
OH
V
OL
V
OHA
V
OLA
V
IH
V
IL
I
IL
I
IH
I
EE
C
IN
C
OUT
Parameter
Cut-off Bus Output Voltage
Output HIGH Voltage Bus
Output LOW Voltage Bus
Output HIGH Voltage Bus
Output LOW Voltage Bus
Output HIGH Voltage Receiver
Output LOW Voltage Receiver
Output HIGH Voltage Receiver
Output LOW Voltage Receiver
Input HIGH Voltage
Input LOW Voltage
Input LOW Current
Input High Current
Power Supply Current
Input Pin Capacitance
Output Pin Capacitance
Min.
–2200
–1025
–1810
–1035
—
–1025
–1810
–1035
—
–1165
–1810
0.5
—
–216
—
—
Typ.
–2160
–955
–1705
—
—
–955
–1705
—
—
—
—
—
—
—
4
5
Max.
–2100
–880
–1620
—
–1610
–880
–1620
—
–1610
–880
–1475
—
150
—
—
—
Unit
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
µA
µA
mA
pF
pF
V
IN
= V
IH
(Min.) or V
IL
(Max.)
Guaranteed HIGH Signal for All Inputs
Guaranteed LOW Signal for All Inputs
V
IN
= V
IL
(Min.)
V
IN
= V
IH
(Max.)
Inputs Open
V
IN
= V
IH
(Max.) or V
IL
(Min.)
Loading with
50Ω to –2.0V
V
IN
= V
IH
(Min.) or V
IL
(Max.)
Condition
V
IN
= V
IH
(Max.) or V
IL
(Min.)
V
IN
= V
IH
(Max.) or V
IL
(Min.)
Loading with
25Ω to –2.20V
Loading with
25Ω to –2.0V
3
Micrel
SY100S891
AC ELECTRICAL CHARACTERISTICS
V
EE
= –4.2V to –5.5V unless otherwise specified; V
CC
= V
CCA
= GND
T
A
= 0
°
C
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
S
Parameter
Propagation Delay
(1)
CLK
1
to Bus
Propagation Delay
(2)
CLK
2
to Q
Propagation Delay
(1)
BUSEN to Bus
Propagation Delay
(1)
Master Reset to Bus
Propagation Delay
(2)
Master Reset to Q
Set-up Time
Bus Wrt CLK
2
D Wrt CLK
1
Master Reset
Release Time
Hold Time
Bus Wrt CLK
2
D Wrt CLK
1
Output Rise Time
Bus
(3)
Q
(4)
Output Fall Time
Bus
(3)
Q
(4)
Skew (Maximum
difference between
slowest and fastest path)
Min.
600
500
500
600
500
Typ.
1000
800
800
1000
800
Max.
1500
1200
1200
1500
1200
T
A
= +25
°
C
Min.
600
500
500
600
500
Typ.
1000
800
800
1000
800
Max.
1500
1200
1200
1500
1200
T
A
= +85
°
C
Min.
600
500
500
600
500
Typ.
1000
800
800
1000
800
Max.
1500
1200
1200
1500
1200
Unit
ps
ps
ps
ps
ps
ps
—
—
—
—
—
—
400
400
1000
—
—
—
—
—
—
400
400
1000
—
—
—
—
—
—
400
400
1000
ps
ps
—
—
500
300
500
300
—
—
—
—
—
—
—
100
400
400
1000
900
1000
900
—
—
—
500
300
500
300
—
—
—
—
—
—
—
100
400
400
1000
900
1000
900
—
—
—
500
300
500
300
—
—
—
—
—
—
—
100
400
400
ps
1000
900
ps
1000
900
—
ps
Condition
t
REL
t
H
t
r
t
f
t
skew
NOTES:
1. Loaded with 25Ω to –2.0V
2. Loaded with 50Ω to –2.0V
3. 25Ω Load
4. 50Ω Load
PRODUCT ORDERING CODE
Ordering
Code
SY100S891JC
SY100S891JCTR
Package
Type
J28-1
J28-1
Operating
Range
Commercial
Commercial
4
Micrel
SY100S891
28 LEAD PLCC (J28-1)
Rev. 03
MICREL-SYNERGY
TEL
3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
FAX
+ 1 (408) 980-9191
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 2000 Micrel Incorporated
5
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