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XC5202-5VQ64C

Description
FPGA, 64 CLBS, 2000 GATES, 83 MHz, PQCC84
CategoryProgrammable logic devices    Programmable logic   
File Size547KB,73 Pages
ManufacturerXILINX
Websitehttps://www.xilinx.com/
Download Datasheet Parametric View All

XC5202-5VQ64C Overview

FPGA, 64 CLBS, 2000 GATES, 83 MHz, PQCC84

XC5202-5VQ64C Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerXILINX
Parts packaging codeQFP
package instructionTFQFP, TQFP64,.47SQ
Contacts64
Reach Compliance Code_compli
Other featuresMAX AVAILABLE 3000 LOGIC GATES
maximum clock frequency83 MHz
Combined latency of CLB-Max4.6 ns
JESD-30 codeS-PQFP-G64
JESD-609 codee0
length10 mm
Humidity sensitivity level3
Configurable number of logic blocks64
Equivalent number of gates2000
Number of entries84
Number of logical units64
Output times84
Number of terminals64
Maximum operating temperature85 °C
Minimum operating temperature
organize64 CLBS, 2000 GATES
Package body materialPLASTIC/EPOXY
encapsulated codeTFQFP
Encapsulate equivalent codeTQFP64,.47SQ
Package shapeSQUARE
Package formFLATPACK, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)225
power supply5 V
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width10 mm
0
R
XC5200 Series
Field Programmable Gate Arrays
0
7*
November 5, 1998 (Version 5.2)
Product Specification
-
Footprint compatibility in common packages within
the XC5200 Series and with the XC4000 Series
- Over 150 device/package combinations, including
advanced BGA, TQ, and VQ packaging available
Fully Supported by Xilinx Development System
- Automatic place and route software
- Wide selection of PC and Workstation platforms
- Over 100 3rd-party Alliance interfaces
- Supported by shrink-wrap Foundation software
Features
• Low-cost, register/latch rich, SRAM based
reprogrammable architecture
- 0.5µm three-layer metal CMOS process technology
- 256 to 1936 logic cells (3,000 to 23,000 “gates”)
- Price competitive with Gate Arrays
• System Level Features
- System performance beyond 50 MHz
- 6 levels of interconnect hierarchy
- VersaRing
I/O Interface for pin-locking
- Dedicated carry logic for high-speed arithmetic
functions
- Cascade chain for wide input functions
- Built-in IEEE 1149.1 JTAG boundary scan test
circuitry on all I/O pins
- Internal 3-state bussing capability
- Four dedicated low-skew clock or signal distribution
nets
• Versatile I/O and Packaging
- Innovative VersaRing
I/O interface provides a high
logic cell to I/O ratio, with up to 244 I/O signals
- Programmable output slew-rate control maximizes
performance and reduces noise
- Zero Flip-Flop hold time for input registers simplifies
system timing
- Independent Output Enables for external bussing
Description
The XC5200 Field-Programmable Gate Array Family is
engineered to deliver low cost. Building on experiences
gained with three previous successful SRAM FPGA fami-
lies, the XC5200 family brings a robust feature set to pro-
grammable logic design. The VersaBlock
logic module,
the VersaRing I/O interface, and a rich hierarchy of inter-
connect resources combine to enhance design flexibility
and reduce time-to-market. Complete support for the
XC5200 family is delivered through the familiar Xilinx soft-
ware environment. The XC5200 family is fully supported on
popular workstation and PC platforms. Popular design
entry methods are fully supported, including ABEL, sche-
matic capture, VHDL, and Verilog HDL synthesis. Design-
ers utilizing logic synthesis can use their existing tools to
design with the XC5200 devices.
.
7
Table 1: XC5200 Field-Programmable Gate Array Family Members
Device
Logic Cells
Max Logic Gates
Typical Gate Range
VersaBlock Array
CLBs
Flip-Flops
I/Os
TBUFs per Longline
XC5202
256
3,000
2,000 - 3,000
8x8
64
256
84
10
XC5204
480
6,000
4,000 - 6,000
10 x 12
120
480
124
14
XC5206
784
10,000
6,000 - 10,000
14 x 14
196
784
148
16
XC5210
1,296
16,000
XC5215
1,936
23,000
10,000 - 16,000 15,000 - 23,000
18 x 18
324
1,296
196
20
22 x 22
484
1,936
244
24
November 5, 1998 (Version 5.2)
7-83
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