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SDC-14566-341

Description
Synchro or Resolver to Digital Converter, Hybrid, 1.900 X 0.780 INCH, 0.210 INCH HEIGHT, DOUBLE WIDTH, KOVAR, DIP-36
CategoryAnalog mixed-signal IC    converter   
File Size196KB,12 Pages
ManufacturerData Device Corporation
Related ProductsFound17parts with similar functions to SDC-14566-341
Download Datasheet Parametric View All

SDC-14566-341 Overview

Synchro or Resolver to Digital Converter, Hybrid, 1.900 X 0.780 INCH, 0.210 INCH HEIGHT, DOUBLE WIDTH, KOVAR, DIP-36

SDC-14566-341 Parametric

Parameter NameAttribute value
Parts packaging codeDIP
package instruction1.900 X 0.780 INCH, 0.210 INCH HEIGHT, DOUBLE WIDTH, KOVAR, DIP-36
Contacts36
Reach Compliance Codeunknow
ECCN codeEAR99
Other featuresBUILT-IN-TEST; PROGRAMMABLE RESOLUTION; ALSO REQUIRES A +5V NOMINAL SUPPLY
Maximum analog input voltage11.8 V
Maximum angular accuracy6.3 arc mi
Converter typeSYNCHRO OR RESOLVER TO DIGITAL CONVERTER
JESD-30 codeR-XDIP-P36
length48.13 mm
Maximum negative supply voltage-15.75 V
Minimum negative supply voltage-14.25 V
Nominal negative supply voltage-15 V
Number of digits16
Number of functions1
Number of terminals36
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialUNSPECIFIED
encapsulated codeQIP
Package shapeRECTANGULAR
Package formIN-LINE
Certification statusNot Qualified
Filter levelMIL-PRF-38534
Maximum seat height5.69 mm
Signal/output frequency1000 Hz
Maximum supply voltage15.75 V
Minimum supply voltage14.25 V
Nominal supply voltage15 V
surface mountNO
technologyHYBRID
Temperature levelCOMMERCIAL
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum tracking rate2.5 rps
width15.24 mm
Base Number Matches1
SDC-14560
SYNCHRO-TO-DIGITAL CONVERTER
DESCRIPTION
The SDC-14560 is a series of high-reli-
ability synchro or resolver-to-digital con-
verters with user-programmable resolu-
tion of 10, 12, 14, or 16 bits. Other fea-
tures of the SDC-14560 are high-quali-
ty velocity output and hermetic seal.
User-programmable resolution has
been designed into the SDC-14560 to
increase the capabilities of modern
motion control systems. The precise
positioning attained at 16-bit resolu-
tion and fast tracking of a 10-bit
device are now available from one 36-
pin double DIP hybrid. Velocity output
(VEL) from the SDC-14560 is a
ground-based voltage of 0 to
±10 VDC with a linearity to 0.7%.
Output voltage is positive for an
increasing angle.
The SDC-14560 series accepts
broadband inputs: 360 Hz to 1 kHz, or
47 Hz to 1 kHz. The digital angle out-
put from the SDC-14560 is a natural
binary code, parallel positive logic
and is TTL/CMOS compatible.
Synchronization to a computer is
accomplished via a converter busy
(CB) and an inhibit (INH) input.
FEATURES
Programmable Resolution:
10, 12, 14 or 16 Bits
High-Quality Velocity Output
Eliminates Tachometer
Accuracy to ±1.3 Arc
Minutes
APPLICATIONS
Because of its high reliability, accura-
cy, small size, and low power con-
sumption, the SDC-14560 is ideal for
the most stringent and severe indus-
trial and military ground or avionics
applications. All models are available
with MIL-PRF-38534 processing as a
standard option.
Designed with three-state output, the
SDC-14560 is especially well suited
for use with computer-based systems.
Among the many possible applica-
tions are radar and navigation sys-
tems, fire control systems, flight
instrumentation, and flight trainers or
simulators.
Small Size
Synchro or Resolver Input
Synthesized Reference
Eliminates 180° Lock-Up
SOLID STATE SYNCHRO INPUT OPTION
SOLID STATE RESOLVER INPUT OPTION
SOLID STATE RESOLVER INPUT OPTION
SIN
θ
COS
θ
VOLTAGE
FOLLOWER
BUFFER
SIN
θ
COS
θ
INTERNAL
DC
REFERENCE
BIT
RL
+15 V
-15 V
S1
S2
S3
ELECTRONIC
SCOTT T
SIN
θ
COS
θ
S1
S2
S3
S4
RESOLVER
CONDITIONER
SIN
θ
COS
θ
INPUT OPTIONS
V
REF IN
RH
REFERENCE
CONDITIONER
R
SYNTHESIZED
REF
BIT DETECT
DIFF
GAIN
OF 2
e
DIFF
GAIN OF
2, 7
SIN
θ
INPUT OPTION
COS
θ
HIGH ACCURACY
CONTROL
TRANSFORMER
VEL
GAIN
e
SIN
(θ-φ)
DEMOD
D
ERROR
PROCESSOR
VEL
T
VCO
U
E
1 LSB ANTIJITTER FEEDBACK
16-BIT CT
TRANSPARENT
LATCH
U
50 ns DELAY
T
0.4-1 µs
CB
+5 V
DIGITAL
ANGLE
φ
16-BIT U-D
COUNTER
Q
INH
3 STATE
TTL BUFFER
16-BIT OUTPUT
TRANSPARENT
LATCH
3 STATE
TTL BUFFER
EDGE
T
TRIGGERED
LATCH
A
B
RESOLUTION CONTROL
INHIBIT
TRANSPARENT
LATCH
POWER
SUPPLY
CONDITIONER
INH
+10 V
INTERNAL DC
REF V (+5 V)
+15
EM
BITS 1-8
BITS 9-16
EL
S
FIGURE 1. SDC-14560 BLOCK DIAGRAM
©
1987, 1999 Data Device Corporation

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