EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

1210J1000681JCR

Description
CAP CER 680PF 100V C0G/NP0 1210
CategoryPassive components   
File Size554KB,6 Pages
ManufacturerKnowles
Websitehttp://www.knowles.com
Environmental Compliance
Download Datasheet Parametric View All

1210J1000681JCR Overview

CAP CER 680PF 100V C0G/NP0 1210

1210J1000681JCR Parametric

Parameter NameAttribute value
capacitance680pF
Tolerance±5%
Voltage - Rated100V
Temperature CoefficientC0G,NP0(1B)
Operating temperature-55°C ~ 125°C
characteristic-
grade-
applicationUniversal
failure rate-
Installation typeSurface mount, MLCC
Package/casing1210 (3225 metric)
size/dimensions0.126" long x 0.098" wide (3.20mm x 2.50mm)
Height - Installation (maximum)-
Thickness (maximum)0.079"(2.00mm)
lead spacing-
Lead form-
notifyThere is currently market demand for these product types, so lead times will change and extend. Lead times may vary.
In the RF field, 90nm GaN has a promising future
Qorvo has long been a leader in the semiconductor industry and is recognized worldwide as a pioneer in innovation. In 2015, Qorvo was the first to release the 150nm GaN node (the industry's first) and...
btty038 RF/Wirelessly
The World Cup ended 6-2 yesterday. Did you watch the game?
I'm not a football fan at all. I watched the World Cup yesterday. Others were very lively while we stayed at home in silence. They scored eight goals in one game, which was really worth the money. But...
吾妻思萌 Talking
Matter Conference Highlights
[i=s]This post was last edited by btty038 on 2022-11-21 23:12[/i]Highlight reel of the Matter Media Launch Event at Capital C in Amsterdam....
btty038 RF/Wirelessly
[Sipeed GW2A FPGA development board]—— Unboxing and core board hardware analysis
1. Unboxing photos2. Core board design2.1. Core board DDR3-204P gold finger appearance Core board DDR3-SODIMM-204P gold finger memory stick appearance design.2.2. DDR3 Memory DesignDDR3: 1Gbit/128MByt...
mars4zhu Domestic Chip Exchange
asyncio cheat sheet
...
dcexpert MicroPython Open Source section
Review summary: Sipeed GW2A FPGA development board
Event details: [Sipeed GW2A FPGA development board]Updated to 2023-01-04Evaluation report summary:@WSir14138Sipeed GW2A controls BLDC motorsSipeed GW2A three-wire SPI reads magnetic encoding dataSipee...
EEWORLD社区 Special Edition for Assessment Centres

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号