Am29LV320D
Data Sheet
July 2003
The following document specifies Spansion memory products that are now offered by both Advanced
Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig-
inally developed the specification, these products will be offered to customers of both AMD and
Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal datasheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appropriate,
and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order
these products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about Spansion
memory solutions.
Publication Number
23579
Revision
C
Amendment
+6
Issue Date
November 15, 2004
THIS PAGE LEFT INTENTIONALLY BLANK.
Am29LV320D
32 Megabit (4 M x 8-Bit/2 M x 16-Bit)
CMOS 3.0 Volt-only, Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES
■
Secured Silicon (SecSi
TM
Sector)
— 64 Kbyte Sector Size; Replacement/substitute
devices (such as Mirrorbit
™
) have 256 bytes.
—
Factory locked and identifiable:
16 bytes (8
words) available for secure, random factory
Electronic Serial Number; verifiable as factory
locked through autoselect function.
ExpressFlash option allows entire sector to be
available for factory-secured data
—
Customer lockable:
Can be programmed once
and then permanently locked after being
shipped from AMD
■
Zero Power Operation
— Sophisticated power management circuits
reduce power consumed during inactive
periods to nearly zero.
■
Package options
— 48-pin TSOP
— 48-ball FBGA
■
Sector Architecture
— Eight 8 Kbyte sectors
— Sixty-three 64 Kbyte sectors
■
Top or bottom boot block
■
Manufactured on 0.23 µm process
technology
■
Compatible with JEDEC standards
— Pinout and software compatible with
single-power-supply flash standard
■
Minimum 1 million erase cycles guaranteed
per sector
■
20 Year data retention at 125°C
— Reliable operation for the life of the system
SOFTWARE FEATURES
■
Supports Common Flash Memory Interface
(CFI)
■
Erase Suspend/Erase Resume
— Suspends erase operations to allow
programming in non-suspended sectors
■
Data# Polling and Toggle Bits
— Provides a software method of detecting the
status of program or erase cycles
■
Unlock Bypass Program command
— Reduces overall programming time when
issuing multiple program command sequences
HARDWARE FEATURES
■
Any combination of sectors can be erased
■
Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or
erase cycle completion
■
Hardware reset pin (RESET#)
— Hardware method of resetting the internal
state machine to the read mode
■
WP#/ACC input pin
— Write protect (WP#) function allows protection
of two outermost boot sectors, regardless of
sector protect status
— Acceleration (ACC) function provides
accelerated program times
■
Sector protection
— Hardware method of locking a sector, either
in-system or using programming equipment,
to prevent any program or erase operation
within that sector
— Temporary Sector Unprotect allows changing
data in protected sectors in-system
PERFORMANCE CHARACTERISTICS
■
High performance
— Access time as fast 90 ns
— Program time: 7µs/word typical utilizing
Accelerate function
■
Ultra low power consumption (typical
values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
Publication#
23579
Rev:
C
Amendment/+6
Issue Date:
November 15, 2004
GENERAL DESCRIPTION
T h e A m 2 9 LV 3 2 0 D i s a 3 2 m e g a b i t , 3 . 0
volt-only flash memory device, organized as
2,097,152 words of 16 bits each or 4,194,304
bytes of 8 bits each. Word mode data appears
on DQ0–DQ15; byte mode data appears on
DQ0–DQ7. The device is designed to be pro-
grammed in-system with the standard 3.0 volt
V
CC
supply, and can also be programmed in
standard EPROM programmers.
The device is available with an access time of
90 or 120 ns. The devices are offered in 48-pin
TSOP and 48-ball FBGA packages. Standard
control pins—chip enable (CE#), write enable
(WE#), and output enable (OE#)—control nor-
mal read and write operations, and avoid bus
contention issues.
The device requires only a
single 3.0 volt
power supply
for both read and write func-
tions. Internally generated and regulated volt-
ages are provided for the program and erase
operations.
tomer code (programmed through AMD’s Ex-
pressFlash service), or both. Customer
Lockable parts may utilize the SecSi Sector as
bonus space, reading and writing like any other
flash sector, or may permanently lock their own
code there.
The device offers complete compatibility with
the
JEDEC single-power-supply Flash com-
mand set standard.
Commands are written to
the command register using standard micro-
processor write timings. Reading data out of
the device is similar to reading from other Flash
or EPROM devices.
The host system can detect whether a program
or erase operation is complete by using the de-
vice
status bits:
RY/BY# pin, DQ7 (Data# Poll-
i n g ) a n d D Q 6 /D Q 2 ( t og g l e b i t s ). A f t e r a
program or erase cycle is completed, the device
automatically returns to the read mode.
The
sector erase architecture
allows mem-
ory sectors to be erased and reprogrammed
without affecting the data contents of other
s e c to rs . T h e d e v i c e i s fu l l y e ra s e d w h en
shipped from the factory.
Hardware data protection
measures include
a low V
CC
detector that automatically inhibits
write operations during power transitions. The
hardware sector protection
feature disables
both program and erase operations in any com-
bination of the sectors of memory. This can be
achieved in-system or via programming equip-
ment.
The device offers two power-saving features.
When addresses are stable for a specified
amount of time, the device enters the
auto-
matic sleep mode.
The system can also place
the device into the
standby mode.
Power con-
sumption is greatly reduced in both modes.
Am29LV320D Features
The
SecSi
TM
Sector
(Secured
Silicon)
is an
extra sector capable of being permanently
locked by AMD or customers. The
SecSi Indi-
cator Bit
(DQ7) is permanently set to a 1 if the
part is
factory locked,
and set to a 0 if
cus-
tomer lockable.
This way, customer lockable
parts can never be used to replace a factory
locked part.
Note that the Am29LV320D has
a SecSi Sector size of 64 Kbytes. AMD de-
vices designated as replacements or sub-
stitutes, such as the Am29LV320M, have
256 bytes. This should be considered dur-
ing system design.
Factory locked parts provide several options.
The SecSi Sector may store a secure, random
16 byte ESN (Electronic Serial Number), cus-
4
Am29LV320D
November 15, 2004
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7
Special Package Handling Instructions .................................... 8
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Ordering Information . . . . . . . . . . . . . . . . . . . . . . 10
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 11
Table 1. Am29LV320D Device Bus Operations ..............................11
Figure 4. Program Operation ......................................................... 27
Chip Erase Command Sequence ........................................... 27
Sector Erase Command Sequence ........................................ 27
Erase Suspend/Erase Resume Commands ........................... 28
Figure 5. Erase Operation.............................................................. 28
Command Definitions ............................................................. 29
Table 14. Am29LV320D Command Definitions ............................. 29
Write Operation Status . . . . . . . . . . . . . . . . . . . . 30
DQ7: Data# Polling ................................................................. 30
Figure 6. Data# Polling Algorithm .................................................. 30
Word/Byte Configuration ........................................................ 11
Requirements for Reading Array Data ................................... 11
Writing Commands/Command Sequences ............................ 12
Accelerated Program Operation .......................................... 12
Autoselect Functions ........................................................... 12
Standby Mode ........................................................................ 12
Automatic Sleep Mode ........................................................... 13
RESET#: Hardware Reset Pin ............................................... 13
Output Disable Mode .............................................................. 13
Table 2. Top Boot Sector Addresses (Am29LV320DT) ..................13
Table 3. Top Boot SecSi
TM
Sector Addresses................................ 14
Table 4. Bottom Boot Sector Addresses (Am29LV320DB) .............15
Table 5. Bottom Boot SecSi
TM
Sector Addresses .......................... 16
RY/BY#: Ready/Busy# ............................................................ 31
DQ6: Toggle Bit I .................................................................... 31
Figure 7. Toggle Bit Algorithm........................................................ 31
DQ2: Toggle Bit II ................................................................... 32
Reading Toggle Bits DQ6/DQ2 ............................................... 32
DQ5: Exceeded Timing Limits ................................................ 32
DQ3: Sector Erase Timer ....................................................... 32
Table 15. Write Operation Status ................................................... 33
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 34
Figure 8. Maximum Negative Overshoot Waveform ...................... 34
Figure 9. Maximum Positive Overshoot Waveform........................ 34
Autoselect Mode ..................................................................... 16
Table 6. Autoselect Codes (High Voltage Method) ........................16
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 34
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 10. I
CC1
Current vs. Time (Showing Active and
Automatic Sleep Currents) ............................................................. 36
Figure 11. Typical I
CC1
vs. Frequency ............................................ 36
Sector/Sector Block Protection and Unprotection .................. 17
Table 7. Top Boot Sector/Sector Block Addresses
for Protection/Unprotection .............................................................17
Table 8. Bottom Boot Sector/Sector Block
Addresses for Protection/Unprotection ...........................................17
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 12. Test Setup.................................................................... 37
Table 16. Test Specifications ......................................................... 37
Figure 13. Input Waveforms and Measurement Levels ................. 37
Write Protect (WP#) ................................................................ 18
Temporary Sector Unprotect .................................................. 18
Figure 1. Temporary Sector Unprotect Operation........................... 18
Figure 2. In-System Sector Protect/Unprotect Algorithms .............. 19
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 14. Read Operation Timings ............................................... 38
Figure 15. Reset Timings ............................................................... 39
SecSi
TM
Sector (Secured Silicon) Flash Memory Region ....... 20
Factory Locked: SecSi Sector Programmed
and Protected at the Factory ............................................... 20
Customer Lockable: SecSi Sector NOT Programmed
or Protected at the Factory .................................................. 20
Figure 3. SecSi Sector Protect Verify.............................................. 21
Word/Byte Configuration (BYTE#) ............................................. 40
Figure 16. BYTE# Timings for Read Operations............................ 40
Figure 17. BYTE# Timings for Write Operations............................ 40
Erase and Program Operations ................................................. 41
Figure 18. Program Operation Timings..........................................
Figure 19. Chip/Sector Erase Operation Timings ..........................
Figure 20. Data# Polling Timings (During Embedded Algorithms).
Figure 21. Toggle Bit Timings (During Embedded Algorithms)......
Figure 22. DQ2 vs. DQ6.................................................................
42
43
44
45
45
Hardware Data Protection ...................................................... 21
Low VCC Write Inhibit ......................................................... 21
Write Pulse “Glitch” Protection ............................................ 21
Logical Inhibit ...................................................................... 21
Power-Up Write Inhibit ......................................................... 21
Common Flash Memory Interface (CFI) . . . . . . . 21
Table 9. CFI Query Identification String .......................................... 22
Table 10. System Interface String................................................... 22
Table 11. Device Geometry Definition ............................................ 23
Table 12. Primary Vendor-Specific Extended Query ...................... 24
Temporary Sector Unprotect ..................................................... 46
Figure 23. Temporary Sector Unprotect Timing Diagram .............. 46
Figure 24. Accelerated Program Timing Diagram.......................... 46
Figure 25. Sector/Sector Block Protect and
Unprotect Timing Diagram ............................................................. 47
Alternate CE# Controlled Erase and Program Operations ........ 48
Figure 26. Alternate CE# Controlled Write
(Erase/Program) Operation Timings .............................................. 49
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 25
Reading Array Data ................................................................ 25
Reset Command ..................................................................... 25
Autoselect Command Sequence ............................................ 25
Table 13. Autoselect Codes ............................................................25
Enter SecSi
TM
Sector/Exit SecSi Sector
Command Sequence .............................................................. 26
Byte/Word Program Command Sequence ............................. 26
Unlock Bypass Command Sequence .................................. 26
Erase And Programming Performance . . . . . . . 50
Latchup Characteristics . . . . . . . . . . . . . . . . . . . 50
TSOP and BGA Package Capacitance . . . . . . . . 50
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 51
FBD048—48-ball Fine-Pitch Ball Grid Array (FBGA)
6 x 12 mm package ................................................................... 51
TS 048—48-Pin Standard TSOP ............................................... 52
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 53
5
November 15, 2004
Am29LV320D
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