AT89S8252-24AI datasheet, PDF - EEWORLD Datasheet

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AT89S8252-24AI: Description8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQCC44; CategoryThe embedded processor and controller Microcontrollers and processors; File Size451KB，41 Pages; ManufacturerAtmel (Microchip)

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AT89S8252-24AI Overview

8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQCC44

AT89S8252-24AI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Atmel (Microchip)
Parts packaging code	QFP
package instruction	10 X 10 MM, 1 MM THICKNESS, 0.80 MM PITCH, PLASTIC, MS-026ACB, TQFP-44
Contacts	44
Reach Compliance Code	unknow
Has ADC	NO
Address bus width	16
bit size	8
CPU series	8051
maximum clock frequency	24 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
JESD-30 code	S-PQFP-G44
JESD-609 code	e0
length	10 mm
Humidity sensitivity level	3
Number of I/O lines	32
Number of terminals	44
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	TQFP
Encapsulate equivalent code	TQFP44,.47SQ,32
Package shape	SQUARE
Package form	FLATPACK, THIN PROFILE
Peak Reflow Temperature (Celsius)	240
power supply	5 V
Certification status	Not Qualified
RAM (bytes)	256
rom(word)	8192
ROM programmability	FLASH
Maximum seat height	1.2 mm
speed	24 MHz
Maximum slew rate	25 mA
Maximum supply voltage	6 V
Minimum supply voltage	4 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	10 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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Features

•

Compatible with MCS

51 Products

•

8K Bytes of In-System Reprogrammable Downloadable Flash Memory

•

– SPI Serial Interface for Program Downloading

– Endurance: 1,000 Write/Erase Cycles

2K Bytes EEPROM

– Endurance: 100,000 Write/Erase Cycles

4V to 6V Operating Range

Fully Static Operation: 0 Hz to 24 MHz

Three-level Program Memory Lock

256 x 8-bit Internal RAM

32 Programmable I/O Lines

Three 16-bit Timer/Counters

Nine Interrupt Sources

Programmable UART Serial Channel

SPI Serial Interface

Low-power Idle and Power-down Modes

Interrupt Recovery from Power-down

Programmable Watchdog Timer

Dual Data Pointer

Power-off Flag

8-bit

Microcontroller

with 8K Bytes

Flash

AT89S8252

Not Recommended

for New Designs.

Use AT89S8253.

Description

The AT89S8252 is a low-power, high-performance CMOS 8-bit microcontroller with 8K

bytes of downloadable Flash programmable and erasable read-only memory and 2K

bytes of EEPROM. The device is manufactured using Atmel’s high-density nonvolatile

memory technology and is compatible with the industry-standard 80C51 instruction

set and pinout. The on-chip downloadable Flash allows the program memory to be

reprogrammed In-System through an SPI serial interface or by a conventional nonvol-

atile memory programmer. By combining a versatile 8-bit CPU with downloadable

Flash on a monolithic chip, the Atmel AT89S8252 is a powerful microcontroller, which

provides a highly-flexible and cost-effective solution to many embedded control

applications.

The AT89S8252 provides the following standard features: 8K bytes of downloadable

Flash, 2K bytes of EEPROM, 256 bytes of RAM, 32 I/O lines, programmable watchdog

timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt

architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition,

the AT89S8252 is designed with static logic for operation down to zero frequency and

supports two software selectable power saving modes. The Idle Mode stops the CPU

while allowing the RAM, timer/counters, serial port, and interrupt system to continue

functioning. The Power-down mode saves the RAM contents but freezes the oscillator,

disabling all other chip functions until the next external interrupt or hardware reset.

The downloadable Flash can be changed a single byte at a time and is accessible

through the SPI serial interface. Holding RESET active forces the SPI bus into a serial

programming interface and allows the program memory to be written to or read from

unless lock bits have been activated.

0401G–MICRO–3/06

Some Port 1 pins provide additional functions. P1.0 and P1.1 can be configured to be

the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input

(P1.1/T2EX), respectively.

Furthermore, P1.4, P1.5, P1.6, and P1.7 can be configured as the SPI slave port select,

data input/output and shift clock input/output pins as shown in the following table.

Port Pin

P1.0

P1.1

P1.4

P1.5

P1.6

P1.7

Alternate Functions

T2 (external count input to Timer/Counter 2), clock-out

T2EX (Timer/Counter 2 capture/reload trigger and direction control)

SS (Slave port select input)

MOSI (Master data output, slave data input pin for SPI channel)

MISO (Master data input, slave data output pin for SPI channel)

SCK (Master clock output, slave clock input pin for SPI channel)

Port 1 also receives the low-order address bytes during Flash programming and

verification.

Port 2

Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers

can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high

by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are exter-

nally being pulled low will source current (I

) because of the internal pull-ups.

Port 2 emits the high-order address byte during fetches from external program memory

and during accesses to external data memory that use 16-bit addresses (MOVX @

DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During

accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits

the contents of the P2 Special Function Register.

Port 2 also receives the high-order address bits and some control signals during Flash

programming and verification.

Port 3

Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers

can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high

by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are exter-

nally being pulled low will source current (I

) because of the pull-ups.

Port 3 receives some control signals for Flash programming and verification.

Port 3 also serves the functions of various special features of the AT89S8252, as shown

in the following table.

AT89S8252

0401G–MICRO–3/06

AT89S8252

Port Pin

P3.0

P3.1

P3.2

P3.3

P3.4

P3.5

P3.6

P3.7

Alternate Functions

RXD (serial input port)

TXD (serial output port)

INT0 (external interrupt 0)

INT1 (external interrupt 1)

T0 (timer 0 external input)

T1 (timer 1 external input)

WR (external data memory write strobe)

RD (external data memory read strobe)

RST

ALE/PROG

Reset input. A high on this pin for two machine cycles while the oscillator is running

resets the device.

Address Latch Enable is an output pulse for latching the low byte of the address during

accesses to external memory. This pin is also the program pulse input (PROG) during

Flash programming.

In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and

may be used for external timing or clocking purposes. Note, however, that one ALE

pulse is skipped during each access to external data memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the

bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is

weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in

external execution mode.

PSEN

Program Store Enable is the read strobe to external program memory.

When the AT89S8252 is executing code from external program memory, PSEN is acti-

vated twice each machine cycle, except that two PSEN activations are skipped during

each access to external data memory.

EA/VPP

External Access Enable. EA must be strapped to GND in order to enable the device to

fetch code from external program memory locations starting at 0000H up to FFFFH.

Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.

EA should be strapped to V

for internal program executions. This pin also receives the

12-volt programming enable voltage (V

) during Flash programming when 12-volt pro-

gramming is selected.

XTAL1

XTAL2

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

Output from the inverting oscillator amplifier.

0401G–MICRO–3/06

AT89S8252-24AI Related Products

	AT89S8252-24AI	AT89S8252	AT89S8252_06
Description	8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQCC44	8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQCC44	8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQCC44
Address bus width	16	16	16
External data bus width	8	8	8
Number of terminals	44	44	44
Maximum operating temperature	85 °C	70 Cel	70 Cel
Minimum operating temperature	-40 °C	0.0 Cel	0.0 Cel
surface mount	YES	Yes	Yes
Temperature level	INDUSTRIAL	COMMERCIAL	COMMERCIAL
Terminal form	GULL WING	J BEND	J BEND
Terminal location	QUAD	QUAD	QUAD
Number of functions	-	1	1
Maximum supply/operating voltage	-	6 V	6 V
Minimum supply/operating voltage	-	4 V	4 V
Rated supply voltage	-	5 V	5 V
Number of input and output buses	-	32	32
Line speed	-	24 MHz	24 MHz
Processing package description	-	PLASTIC, MS-018AC, LCC-44	PLASTIC, MS-018AC, LCC-44
state	-	DISCONTINUED	DISCONTINUED
Craftsmanship	-	CMOS	CMOS
packaging shape	-	SQUARE	SQUARE
Package Size	-	CHIP CARRIER	CHIP CARRIER
Terminal spacing	-	1.27 mm	1.27 mm
terminal coating	-	TIN LEAD	TIN LEAD
Packaging Materials	-	PLASTIC/EPOXY	PLASTIC/EPOXY
Number of digits	-	8	8
Maximum FCLK clock frequency	-	24 MHz	24 MHz
Microprocessor type	-	MICROCONTROLLER	MICROCONTROLLER
ROM programming	-	FLASH	FLASH

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