EEWORLDEEWORLDEEWORLD

Part Number

Search

CAT28F010H-12T

Description
x8 Flash EEPROM
Categorystorage    storage   
File Size434KB,15 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Environmental Compliance
Download Datasheet Parametric View All

CAT28F010H-12T Online Shopping

Suppliers Part Number Price MOQ In stock  
CAT28F010H-12T - - View Buy Now

CAT28F010H-12T Overview

x8 Flash EEPROM

CAT28F010H-12T Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerCatalyst
Parts packaging codeTSOP
package instruction8 X 20 MM, LEAD AND HALOGEN FREE, TSOP-32
Contacts32
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum access time120 ns
command user interfaceYES
Data pollingNO
Durability100000 Write/Erase Cycles
JESD-30 codeR-PDSO-G32
JESD-609 codee3
length18.4 mm
memory density1048576 bit
Memory IC TypeFLASH
memory width8
Humidity sensitivity level2A
Number of functions1
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize128KX8
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Encapsulate equivalent codeTSSOP32,.8,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Programming voltage12 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum standby current0.0001 A
Maximum slew rate0.03 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
switch bitNO
typeNOR TYPE
width8 mm
Base Number Matches1
CAT28F010
1 Megabit CMOS Flash Memory
Licensed Intel second source
FEATURES
I
Fast read access time: 90/120 ns
I
Low power CMOS dissipation:
H
LOGEN
FR
A
EE
LE
A
D
F
R
E
E
TM
I
Commercial, industrial and automotive
temperature ranges
I
On-chip address and data latches
I
JEDEC standard pinouts:
–Active: 30 mA max (CMOS/TTL levels)
–Standby: 1 mA max (TTL levels)
–Standby: 100
µ
A max (CMOS levels)
I
High speed programming:
–10
µ
s per byte
–2 Sec Typ Chip Program
–32-pin DIP
–32-pin PLCC
–32-pin TSOP (8 x 20)
I
100,000 program/erase cycles
I
10 year data retention
I
Electronic signature
I
0.5 seconds typical chip-erase
I
12.0V
±
5% programming and erase voltage
I
Stop timer for program/erase
DESCRIPTION
The CAT28F010 is a high speed 128K x 8-bit electrically
erasable and reprogrammable Flash memory ideally
suited for applications requiring in-system or after-sale
code updates. Electrical erasure of the full memory
contents is achieved typically within 0.5 second.
It is pin and Read timing compatible with standard
EPROM and EEPROM devices. Programming and
Erase are performed through an operation and verify
algorithm. The instructions are input via the I/O bus,
using a two write cycle scheme. Address and Data are
latched to free the I/O bus and address bus during the
write operation.
The CAT28F010 is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 10 years. The device is available in JEDEC
approved 32-pin plastic DIP, 32-pin PLCC or 32-pin
TSOP packages.
I/O0–I/O7
BLOCK DIAGRAM
I/O BUFFERS
ERASE VOLTAGE
SWITCH
WE
COMMAND
REGISTER
PROGRAM VOLTAGE
SWITCH
CE, OE LOGIC
DATA
LATCH
SENSE
AMP
CE
OE
ADDRESS LATCH
Y-GATING
Y-DECODER
1,048,576 BIT
MEMORY
ARRAY
A0–A16
X-DECODER
VOLTAGE VERIFY
SWITCH
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1019, Rev. D
Factory machinery RS485 wireless communication acquisition IP MODEM remote measurement and control
[p=null, 2, left][color=rgb(0, 0, 0)][font=sans-serif]At present, many devices in factories run independently and are not connected. The data of equipment operation status and production cycle cannot ...
欣仰邦 RF/Wirelessly
Automotive mmWave Sensor Application Design Resources
[i=s]This post was last edited by Jacktang on 2019-4-18 20:24[/i] [float=left][size=5]1. Front Long-Range Radar[/size][size=5]Design Resources[/size][/float][size=5][color=rgb(17, 136, 153)][backcolor...
Jacktang Microcontroller MCU
Huawei's internal hardware development and design process
[Reposted from the Internet, I hope you can gain something from reading it] In 2007, I went to a small company for an interview with two years of work experience. After the written test, the other par...
eric_wang Talking
PWM rectifier working mode problem
[Ask if you don't understand] In the following figure, both the single-phase full-bridge PWM rectifier in Figure b and Figure c are in the same switching mode. Figure b is easy to understand, the AC v...
shaorc Power technology
Choose VHDL or Verilog HDL
Hardware Description Language HDL (Hardware Describe Language) HDL Overview With the development of EDA technology, it has become a trend to design PLD/FPGA using hardware language. The most important...
1234 FPGA/CPLD
Three pictures to understand 2-DOF PID control
2-DOF PID control is a control technology used in some advanced control algorithm temperature controllers. This post discusses 2-DOF PID control in the form of pictures and text. In the previous PID c...
zidonghua01 Industrial Control Electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号