pin is grounded. IN0 and IN2 = +1 V dc, IN1 and IN3 = –1 V dc. A0 is driven with a 0 V to +5 V pulse, A1 is grounded. Measure transition time from 50% of the A0
input value (+2.5 V) and 10% (or 90%) of the total output voltage transition from IN0 channel voltage (+1 V) to IN1 (–1 V), or vice versa. All inputs are measured in a similar
manner using A0 and A1 to select the channels.
2
ENABLE
pin is driven with 0 V to +5 V pulse (with 3 ns edges). The state of the A0 and A1 pins determines which input is activated (refer to Table I). Set IN0 and IN2 = +1 V dc,
IN1 and IN3 = –1 V dc, and measure transition time from 50% of
ENABLE
pulse (+2.5 V) to 90% of the total output voltage change. In Figure 4,
∆t
OFF
is the disable time,
∆t
ON
is the enable time.
3
All inputs are grounded. A0 input is driven with 0 V to +5 V pulse, A1 is grounded. The output is monitored. Speeding the edges of the A0 pulse increases the glitch magnitude
due to coupling via the ground plane. Removing the A0 and A1 terminations will lower the glitch, as does increasing R
L
.
4
Decreasing R
L
slightly lowers the bandwidth. Increasing C
L
significantly lowers the bandwidth (see Figure 18).
5
A resistor (R
S
) placed in series with the multiplexer inputs serves to optimize 0.1 dB flatness, but is not required (see Figure 19.)
6
Select an input that is not being driven (i.e., A0 and A1 are logic 0, IN0 is selected); drive all other inputs with V
IN
= 0.707 V rms and monitor the output at ƒ = 5 and 30 MHz.
R
L
= 2 kΩ (see Figure 12).
7
Multiplexer is disabled (i.e.,
ENABLE
= logic 1) and all inputs are driven simultaneously with V
IN
= 0.446 V rms. Output is monitored at ƒ = 5 and 30 MHz. R
L
= 30
Ω
to simu-
late R
ON
of one enabled multiplexer within a system (see Figure 13). In this mode the output impedance is very high (typ 10 MΩ), and the signal couples across the package; the
load impedance determines the crosstalk.
8
Voltage gain decreases for lower values of R
L
. The resistive divider formed by the multiplexers enables output resistance (28
Ω)
and R
L
causes a gain that increases as R
L-
decreases (i.e., the voltage gain is approximately 0.97 V/V [3% gain error] for R
L
= 1 kΩ).
9
Larger values of R
L
provide wider output voltage swings, as well as better gain accuracy. See Note 8.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
1
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air: 14-pin plastic package:
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