PI6LC48P02
2-Output LVPECL Fibre Channel (FC) and Ethernet Clock Generator
Features
ÎÎ
Two differential LVPECL output pairs
ÎÎ
Selectable crystal oscillator interface or LVCMOS/LVTTL
Description
The PI6LC48P02 is a 2-output LVPECL synthesizer optimized
to generate Fibre Channel, Ethernet and storage reference clock
frequencies and is a member of Pericom’s HiFlex family of high
performance clock solutions. Using a 26.5625MHz crystal, the
most popular Fibre Channel (FC) frequencies can be generated
based on the settings of 2 frequency select pins. Using 25MHz
Xtal, most Ethenrnet frequencies inckuding 100MHz can be
generated, while using 26.041667MHz Xtal, 156.25MHz can be
generated for Networking applications.
The PI6LC48P02 uses Pericom’s proprietary low phase noise
PLL technology to achieve ultra low phase jitter, it is ideal for
Networking, data center, and storage systems.
single-ended clock input
ÎÎ
Supports the following output frequencies:
ÎÎ
Ethernet: 50MHz, 100MHz, 150MHz, 156.25MHz,
200MHz
ÎÎ
Fibre Channel: 53.125MHz, 106.25MHz, 159.375MHz,
187.5MHz, 212.5MHz
ÎÎ
RMS phase jitter @ 212.5MHz, using a 26.5625MHz crystal
(12kHz – 20MHz): 0.28ps (typical)
– 20MHz): 0.32ps (typical)
ÎÎ
RMS phase jitter @ 100MHz, using a 25MHz crystal (12kHz
ÎÎ
RMS phase jitter @ 156.25MHz, using a 26.041667MHz
crystal (12kHz – 20MHz): 0.30ps (typical)
Applications
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Networking and Data Center Server systems
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Fibre Channel (FC) and Storage systems
ÎÎ
Full 3.3V or 2.5V supply modes
ÎÎ
Industrial operating temperature
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Available in lead-free package: 20-TSSOP
Block Diagram
XTAL_IN
XTAL_OUT
Ref_IN
OSC
PFD
VCO
/N
CLK0
CLK0#
IN_SEL
M
PLL_ByPass
N_SEL[0:1]
CLK1
CLK1#
M_reset
15-0102
1
www.pericom.com
PI6LC48P02
Rev. C
08/13/15
2-Output LVPECL Fibre Channel (FC) and Ethernet Clock Generator
Pin Configuration
NC
VDDO
CLK0
CLK0#
M_reset
PLL_ByPass
NC
VDDA
N_SEL0
VDD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VDDO
CLK1
CLK1#
GND
VDD
IN_SEL
Ref_IN
XTAL_IN
XTAL_OUT
N_SEL1
PI6LC48P02
Pinout Table
Pin No.
1, 7
2, 20
3,4
5
6
8
9, 11
10, 16
12, 13
14
15
17
18, 19
Pin Name
NC
VDDO
CLK0, CLK0#
M_reset
PLL_ByPass
VDDA
VDD
XOUT, XIN
Ref_IN
IN_SEL
GND
CLK1#,
CLK1
I/O Type
Power
Output
Input
Input
Power
Power
Crystal
Input
Input
Ground
Output
-
-
Pull-down
Description
No connection
Output Power Supply
LVPECL Output clock 0
Master reset. “1”, CLK0/CLK1 go to “low”, CLK0#/CLK1# go to
“high”; “0” outputs are enabled
Analog Power Supply
Core Power Supply
Crystal input and output
Pull-down PLL bypass select. “0” PLL is enabled, “1” PLL is bypassed
-
-
-
Pull-down Output frequency select
N_SEL0, N_SEL1 Input
Pull-down CMOS reference clock input
Pull-down “0” selects Crystal, “1” selects reference input
-
-
Ground
LVPECL Output clock 1
15-0102
2
www.pericom.com
PI6LC48P02
Rev. C
08/13/15
2-Output LVPECL Fibre Channel (FC) and Ethernet Clock Generator
Output Frequency Selection Table
Xtal Frequency (MHz)
N_SEL1 N_SEL0
00
25
01
10
11
00
26.5625
01
10
11
23.4375
26.041667
00
01
PI6LC48P02
Output Frequency (MHz)
200
150
100
50
212.5
159.375
106.25
53.125
187.5
156.25
Typical Crystal Requirement
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance
(ESR)
Shunt Capacitance
Drive Level
23.33
Minimum
Typical
Fundamental
Maximum
28.33
50
7
1
Units
MHz
Ω
pF
mW
Recommended Crystal Specification
Pericom recommends:
a) FL2650003, SMD 3.2x2.5(4P), 26.5625MHz, CL=18pF, +/-25ppm, http://www.pericom.com/pdf/datasheets/se/FL.pdf
b) FY2650002, SMD 5x3.2(4P), 26.5625MHz, CL=18pF, +/-30ppm, http://www.pericom.com/pdf/datasheets/se/FY_F9.pdf
c) FL2500047, SMD 3.2x2.5(4P), 25MHz, CL=18pF, +/-20ppm. http://www.pericom.com/pdf/datasheets/se/FL.pdf
d) FY2500091, SMD 5x3.2(4P), 25MHz, CL=18pF, +/-30ppm. http://www.pericom.com/pdf/datasheets/se/FY_F9.pdf
For other crystal options, please contact Pericom sales.
15-0102
3
www.pericom.com
PI6LC48P02
Rev. C
08/13/15
2-Output LVPECL Fibre Channel (FC) and Ethernet Clock Generator
Maximum Ratings
(Over operating free-air temperature range)
Storage Temperature.............................................. -65ºC to+155ºC
Ambient Temperature with Power Applied .........-40ºC to+85ºC
Supply Voltage .............................................................-0.5 to +3.7V
ESD Protection (HBM) ......................................................... 2000V
PI6LC48P02
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics
Power Supply DC Characterisitcs,
(T
A
= -40ºC to 85ºC)
Symbol
Parameter
Condition
Min
2.97
2.375
Typ
3.3
2.5
Max
3.63
2.625
110
30
Units
V
V
mA
mA
V
DD
,
Supply Voltage
V
DDA
,
V
DDO
V
DD
,
Supply Voltage
V
DDA
,
V
DDO
I
GND
I
DDA
Power Supply Current
Analog Supply Current
LVCMOS/LVTTL DC Characterisitcs,
(T
A
= -40ºC to 85ºC)
Symbol
V
IH
V
IL
Parameter
Input High Voltage
Input Low Voltage
Condition
V
DD
= 3.3 V +/- 10%
V
DD
= 2.5 V +/- 5%
V
DD
= 3.3 V +/- 10%
V
DD
= 2.5 V +/- 5%
M_reset, PLL_ByPass, N_SEL[0:1],
IN_SEL, Ref_IN
V
DD
= VIN = 3.63V
M_reset, PLL_ByPass, N_SEL[0:1],
IN_SEL, Ref_IN
V
DD
= 3.63V,
V
IN
= 0V
Min
2
1.7
-0.3
-0.3
Typ
Max
V
DD
+ 0.3
V
DD
+ 0.3
0.8
0.7
150
Units
V
V
V
V
µA
I
IH
Input High Current
I
IL
Input Low Current
-5
µA
Pin Characterisitcs
Symbol
C
IN
Parameter
Input Capacitance
Condition
Min
Typ
4
51
Max
Units
pF
kΩ
R
PULLDOWNN
Pull down resistor
15-0102
4
www.pericom.com
PI6LC48P02
Rev. C
08/13/15
2-Output LVPECL Fibre Channel (FC) and Ethernet Clock Generator
LVPECL DC Characterisitcs,
(T
A
= -40ºC to 85ºC)
Symbol
V
OH
V
OL
PI6LC48P02
Parameter
Output High Voltage
(1)
Output Low Voltage
(1)
Condition
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= 3.3V
V
DD
= 2.5V
Min
1.9
1.1
1.2
0.4
Typ
Max
2.4
1.6
1.6
0.8
Units
V
V
Note:
1. LVPECL Termination: Source 150ohm to GND and 100ohm across CLK and CLK#.
AC Electrical Characteristics,
(T
A
= -40ºC to 85ºC)
Symbol
Parameter
LVPECL Termination: Source 150ohm to GND and using 0.01uF ac-coupled to 50ohm to GND
Condition
N_SEL[1:0] = 00
f
OUT
Output Frequency
N_SEL[1:0] = 01
N_SEL[1:0] = 10
N_SEL[1:0] = 11
t
sk(o)
Output Skew
(1, 3)
Outputs at the same same loading
212.5MHz, (637kHz - 10MHz)
212.5MHz, (12kHz - 20MHz)
200MHz, (1.875MHz - 20MHz)
200MHz, (12kHz - 20MHz)
156.25MHz, (1.875MHz - 20MHz)
156.25MHz, (12kHz - 20MHz)
159.375MHz, (637kHz - 10MHz)
159.375MHz, (12kHz - 20MHz)
150MHz, (1.875MHz - 20MHz)
t
jit(Ø)
RMS Phase Jitter,
(Random)
(2)
150MHz, (12kHz - 20MHz)
106.25MHz, (637kHz - 10MHz)
106.25MHz, (12kHz - 20MHz)
100MHz, (1.875MHz - 20MHz)
100MHz, (12kHz - 20MHz)
53.125MHz, (637kHz - 10MHz)
53.125MHz, (12kHz - 20MHz)
50MHz, (1.875MHz - 10MHz)
50MHz, (12kHz - 20MHz)
187.5MHz, (1.875MHz - 10MHz)
187.5MHz, (12kHz - 20MHz)
Min.
186.67
140
93.33
46.67
Typ.
Max
226.67
170
113
56.67
Units
MHz
MHz
MHz
MHz
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
30
0.17
0.28
0.10
0.29
0.15
0.30
0.20
0.30
0.15
0.31
0.20
0.32
0.18
0.32
0.25
0.42
0.36
0.60
0.11
0.28
15-0102
5
www.pericom.com
PI6LC48P02
Rev. C
08/13/15