531AB64M0000BGR datasheet, PDF

531AB64M0000BGR: DescriptionLVPECL Output Clock Oscillator, 64MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size268KB，15 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531AB64M0000BGR Overview

LVPECL Output Clock Oscillator, 64MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Is Samacsys	N
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	64 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVPECL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

When checking the PCB using Altium Designer, I found that the signal line is segmented. What's going on?: ...; xidianyangyw PCB Design

Just to meet you, Fuchang Electronics WeChat recruitment is now online: [align=left]Dear, [/align][align=left] [/align][align=left]After the Chinese New Year, do you have enough energy to find a job? [/align][align=left] [/align][align=left]If you didn’t meet Mr. Right on...; meteor11111 Talking about work

Begging: Traffic light display system based on single chip microcomputer (I) Design content: 1. There are three kinds of signal lights, red, yellow and green, in the east-west direction and north-south directi...; 强哥哥。。 MCU

EEWORLD University ---- FPGA design and FPGA application based on Verilog HDL (Intel official tutorial): FPGA design and FPGA application based on Verilog HDL (Intel official tutorial) : https://training.eeworld.com.cn/course/5564The basics and design methods of Verilog hardware description language were...; Lemontree FPGA/CPLD

Showing off the goods + the first wave of development boards: Computer Circle USB Development BoardCPLD Development BoardSabretooth STM8 Development BoardWater Sensor...; chenbingjy Special Edition for Assessment Centres

New Clock Configuration for Serial Communication of 8051 High-speed Single-chip Microcomputer Based on DS1075: Abstract : DS1075 is an Econ Oscillator produced by Dallas Semicondactor. It contains an oscillator and a frequency division chain, which can provide the most suitable clock frequency and high clock a...; rain 51mcu

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components