ISL9012IRFJZ datasheet, PDF - EEWORLD Datasheet

ISL9012IRFJZ: DescriptionLDO Voltage Regulators W/ANNEAL LW NOISE HI PSRRLDO 10LD 3X3 5V/; CategoryPower/power management The power supply circuit; File Size219KB，11 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/; Environmental Compliance

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LDO Voltage Regulators W/ANNEAL LW NOISE HI PSRRLDO 10LD 3X3 5V/

Parameter Name	Attribute value
Brand Name	Intersil
Is it Rohs certified?	conform to
Maker	Renesas Electronics Corporation
Parts packaging code	DFN
package instruction	HVSON, SOLCC10,.11,20
Contacts	10
Reach Compliance Code	compliant
ECCN code	EAR99
Adjustability	FIXED
Maximum drop-back voltage 1	0.2 V
Nominal dropback voltage 1	0.3 V
Maximum drop-back voltage 2	0.4 V
Maximum absolute input voltage	7.1 V
Maximum input voltage	6.5 V
Minimum input voltage	2.3 V
JESD-30 code	S-PDSO-N10
JESD-609 code	e3
length	3 mm
Maximum grid adjustment rate	0.01%
Maximum load regulation	0.028%
Humidity sensitivity level	1
Number of functions	1
Output times	2
Number of terminals	10
Working temperatureTJ-Max	125 °C
Working temperature TJ-Min	-40 °C
Maximum output current 1	0.15 A
Maximum output current 2	0.3 A
Maximum output voltage 1	2.545 V
Minimum output voltage 1	2.455 V
Nominal output voltage 1	2.5 V
Maximum output voltage 2	2.8504 V
Minimum output voltage 2	2.7496 V
Nominal output voltage 2	2.8 V
Package body material	PLASTIC/EPOXY
encapsulated code	HVSON
Encapsulate equivalent code	SOLCC10,.11,20
Package shape	SQUARE
Package form	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Regulator type	FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR
Maximum seat height	1 mm
surface mount	YES
technology	CMOS
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
Maximum voltage tolerance	1.8%
width	3 mm

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