The DS1339A serial real-time clock (RTC) is a low-
power clock/date device with two programmable time-
of-day alarms and a programmable square-wave output.
Address and data are transferred serially through an I
2
C
bus. The clock/date provides seconds, minutes, hours,
day, date, month, and year information. The date at the
end of the month is automatically adjusted for months
with fewer than 31 days, including corrections for leap
year. The clock operates in either the 24-hour or 12-hour
format with AM/PM indicator. The DS1339A has a built-
in power-sense circuit that detects power failures and
automatically switches to the backup supply, maintaining
time, date, and alarm operation.
Benefits and Features
S
Drop-In Replacement for DS1339
S
Real-Time Clock (RTC) Counts Seconds, Minutes,
Hours, Day, Date, Month, and Year with Leap-Year
Compensation Up to 2200
Two Time-of-Day Alarms
Programmable Square-Wave Output
S
Supports Crystals with Up to 60kΩ ESR
S
Maintains Time Even During Power Outage with
Backup Supply Pin
Automatic Power-Fail Detect and Switch
Circuitry
Trickle-Charge Capability
Supports V
CC
from 1.8V to 5V
Oscillator Stop Flag
Oscillator Runs Down to 1.15V
S
Interfaces with a Wide Range of Microcontrollers
I
2
C Serial Interface
S
Underwriters Laboratories (UL) Recognized
Ordering Information
appears at end of data sheet.
For related parts and recommended products to use with this part,
refer to
www.maximintegrated.com/DS1339A.related.
Applications
Handhelds (GPS, POS Terminals)
Consumer Electronics (Set-Top Box, Digital
Recording, Network Appliance)
Office Equipment (Fax/Printers, Copier)
Medical (Glucometer, Medicine Dispenser)
Telecommunications (Routers, Switches, Servers)
Other (Utility Meter, Vending Machine,
Thermostat, Modem)
Functional Diagram
SQW/INTB
4.096kHz
MUX/
BUFFER
N
DS1339A
32.768kHz
8.192kHz
1Hz
X1
/4
/2
/4096
X2
OSCILLATOR
AND
DIVIDER
POWER CONTROL
CONTROL LOGIC
ALARMS,
TRICKLE CHARGER, AND
CONTROL REGISTERS
CLOCK AND
CALENDAR REGISTERS
V
CC
V
BACKUP
SCL
SDA
N
SERIAL BUS
INTERFACE AND
ADDRESS
REGISTER
USER BUFFER
(7 BYTES)
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
19-6425; Rev 2; 1/15
DS1339A
Low-Current, I
2
C, Serial Real-Time Clock
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground ....-0.3V to +6.0V
Operating Temperature Range (Noncondensing)....-40NC to +85NC
Storage Temperature Range............................ -55NC to +125NC
Lead Temperature (soldering, 10 seconds) ...................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
µSOP
Junction-to-Ambient Thermal Resistance (B
JA
) .....206.3NC/W
Junction-to-Case Thermal Resistance (B
JC
) ...............42NC/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
RECOMMENDED OPERATING CONDITIONS
(T
A
= -40NC to +85NC, unless otherwise noted.) (Note 2)
PARAMETER
Supply Voltage
Backup Supply Voltage
Logic 1
Logic 0
Power-Fail Voltage
SYMBOL
V
CC
V
BACKUP
V
BACKMIN
V
IH
V
IL
V
PF
CONDITIONS
MIN
1.71
1.3
1.15
0.7 x
V
CC
-0.3
1.51
1.61
TYP
3.3
3.0
1.3
5.5
0.3 x
V
CC
1.71
MAX
5.5
3.7
UNITS
V
V
V
V
V
DC ELECTRICAL CHARACTERISTICS
(V
CC
= MIN to MAX,
V
BACKUP
= MIN to MAX, T
A
= -40NC to +85NC.) (Note 2)
PARAMETER
Input Leakage
I/O Leakage
Logic 0 Out (SDA or SQW/INT)
V
OL
= 0.4V,
V
CC
R
V
CCMIN
Logic 0 Out (SQW/INT)
V
OL
= 0.2V, V
CC
= 0V,
V
BAT
R
V
BATMIN
V
CC
Active Current
V
CC
Standby Current
Trickle-Charger Resistor Register
10h = A5h, V
CC
= Typ,
V
BACKUP
= 0V
Maxim Integrated
SYMBOL
I
LI
I
LO
I
OL
(Note 3)
(Note 4)
(Note 4)
CONDITIONS
MIN
-0.1
-0.1
TYP
MAX
0.1
0.1
3
UNITS
FA
FA
mA
I
OL
I
CCA
I
CCS
R1
(Note 4)
(Note 5)
(Note 6)
(Note 7)
200
250
450
200
FA
FA
FA
I
2
DS1339A
Low-Current, I
2
C, Serial Real-Time Clock
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= MIN to MAX,
V
BACKUP
= MIN to MAX, T
A
= -40NC to +85NC, unless otherwise noted.) (Note 2)
PARAMETER
Trickle-Charger Resistor Register
10h = A6h, V
CC
= Typ,
V
BACKUP
= 0V
Trickle-Charger Resistor Register
10h = A7h, V
CC
= Typ,
V
BACKUP
= 0V
V
BACKUP
Leakage Current
SYMBOL
R2
CONDITIONS
MIN
TYP
2000
MAX
UNITS
I
R3
I
BKLKG
-100
4000
25
200
I
nA
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 0V,
V
BACKUP
= MIN to MAX, T
A
= -40NC to +85NC, unless otherwise noted.) (Note 2)
PARAMETER
V
BACKUP
Current EOSC = 0,
SQW Off
V
BACKUP
Current EOSC = 0,
SQW On
V
BACKUP
Current EOSC = 1
SYMBOL
I
BKOSC
I
BKSQW
I
BKDR
(Note 8)
(Note 8)
CONDITIONS
MIN
TYP
300
500
10
MAX
600
1100
200
UNITS
nA
nA
nA
AC ELECTRICAL CHARACTERISTICS
(V
CC
= MIN to MAX, T
A
= -40NC to +85NC, unless otherwise noted.) (Note 2,
Figure 1)
PARAMETER
SCL Clock Frequency
Bus Free Time Between a STOP
and START Condition
Hold Time (Repeated) START
Condition
Low Period of SCL Clock
High Period of SCL Clock
Setup Time for a Repeated
START Condition
Data Hold Time
Data Setup Time
Rise Time of Both SDA and SCL
Signals
Fall Time of Both SDA and SCL
Signals
Setup Time for STOP Condition
SYMBOL
f
SCL
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
(Notes 10, 11)
(Note 12)
(Note 13)
(Note 13)
(Note 9)
CONDITIONS
MIN
0.03
1.3
0.6
1.3
0.6
0.6
0
100
20 +
0.1C
B
20 +
0.1C
B
0.6
300
300
0.9
TYP
MAX
400
UNITS
kHz
Fs
Fs
Fs
Fs
Fs
Fs
ns
ns
ns
Fs
Maxim Integrated
3
DS1339A
Low-Current, I
2
C, Serial Real-Time Clock
AC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= MIN to MAX, T
A
= -40NC to +85NC, unless otherwise noted.) (Note 2,
Figure 1)
PARAMETER
Capacitive Load for Each Bus
Line
I/O Capacitance (SDA, SCL)
Oscillator Stop Flag (OSF) Delay
Timeout Interval
SYMBOL
C
B
C
I/O
t
OSF
t
TIMEOUT
(Note 13)
(Note 14)
(Note 15)
(Note 16)
25
CONDITIONS
MIN
TYP
MAX
400
10
100
35
UNITS
pF
pF
ms
ms
POWER-UP/DOWN CHARACTERISTICS
(T
A
= -40NC to +85NC, unless otherwise noted.) (Note 2,
Figure 2)
PARAMETER
Recovery at Power-Up
V
CC
Slew Rate; V
PF
to 0V
V
CC
Slew Rate; 0V to V
PF
SYMBOL
t
REC
t
VCCF
t
VCCR
(Note 17)
CONDITIONS
MIN
TYP
1
MAX
2
1/50
1/1
UNITS
ms
V/Fs
V/Fs
WARNING: Under no circumstances are negative undershoots, of any amplitude, allowed when device is in battery-backup
mode.
Note 2:
Limits are 100% production tested at T
A
= +25NC and T
A
= +85NC. Limits over the operating temperature range and rel-
evant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed.
Note 3:
SCL only.
Note 4:
SDA and SQW/INT.
Note 5:
I
CCA
—SCL at f
SCL
max, V
IL
= 0.0V, V
IH
= V
CC
, trickle charger disabled.
Note 6:
Specified with the I
2
C bus inactive, V
IL
= 0.0V, V
IH
= V
CC
, trickle charger disabled.
Note 7:
V
CC
must be less than 3.63V if the 200I resistor is selected.
Note 8:
Using recommended crystal on X1 and X2.
Note 9:
After this period, the first clock pulse is generated.
Note 10:
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V
IHMIN
of the SCL signal)
to bridge the undefined region of the falling edge of SCL.
Note 11:
The maximum t
HD:DAT
need only be met if the device does not stretch the low period (t
LOW
) of the SCL signal.
Note 12:
A fast-mode device can be used in a standard-mode system, but the requirement t
SU:DAT
R
to 250ns must then be met.
This is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch
the low period of the SCL signal, it must output the next data bit to the SDA line t
R(MAX)
+ t
SU:DAT
= 1000 + 250 = 1250ns
before the SCL line is released.
Note 13:
C
B
—total capacitance of one bus line in pF.
Note 14:
Guaranteed by design; not production tested.
Note 15:
The parameter t
OSF
is the period of time the oscillator must be stopped for the OSF flag to be set.
Note 16:
The DS1339A can detect any single SCL clock held low longer than t
TIMEOUTMIN
. The device’s I
2
C interface is in reset
state and can receive a new START condition when SCL is held low for at least t
TIMEOUTMAX
. Once the device detects
this condition, the SDA output is released. The oscillator must be running for this function to work.
Note 17:
This delay applies only if the oscillator is running. If the oscillator is disabled or stopped, no power-up delay occurs.
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